[Intel-gfx] [PATCH] drm/i915: Relinquish any fence when changing cache levels

[Eric Anholt]

On Wed, 13 Apr 2011 13:25:40 +0100, Chris Wilson <chris at chris-wilson.co.uk> wrote:
> This is vital to maintain our contract with the hw for not using fences
> on snooped memory for older chipsets. It should have no impact
> other than clearing the fence register (and updating the fence
> bookkeeping) as any future IO access (page faults or pwrite/pread) will
> go through the cached CPU domain for older chipsets. On SandyBridge, we
> incur an extra get_fence() on the rare path that we need to perform
> detiling through a pagefault (i.e. texture transfers).

Surely you could just update this to do that for the hardware that
requires it.  With a comment so someone doesn't delete it later :)

> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> ---
>  drivers/gpu/drm/i915/i915_gem.c |    4 ++++
>  1 files changed, 4 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 6ca026d..2d16a23 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3355,6 +3355,10 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
>  		if (ret)
>  			return ret;
>  
> +		ret = i915_gem_object_put_fence(obj);
> +		if (ret)
> +			return ret;
> +
>  		ret = i915_gem_gtt_bind_object(obj, cache_level);
>  		if (ret)
>  			return ret;
> -- 
> 1.7.4.1
> 
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