[Intel-gfx] [PATCH] drm/i915: Prevent use of pages >4GiB on 965G[M]

[Chris Wilson]

On Wed, 20 Apr 2011 17:21:03 -0700, Eric Anholt <eric at anholt.net> wrote:
> On Sun, 17 Apr 2011 17:37:32 +0100, Chris Wilson <chris at chris-wilson.co.uk> wrote:
> > The 965G (Broadwater) and 965GM (Crestline) chipsets had many errata in
> > handling pages allocation above 4GiB. So we should be careful never to
> > allocate and attempt to pass such through to the GPU and so limit
> > ourselves to GFP_DMA32 on those chipsets.
> 
> Unfortunate to see this -- were there more particular bugs in >4GB
> handling found, or is it just "I'm tired of worrying about it, let's
> avoid this class of problem"?  I'm not saying "no" to this patch for
> either answer, just curious.

It's an investigatory patch because 965GM is still misbehaving, and those
warnings in the docs scared me.

A solution in search of a problem, i.e. it may help someone and that would
be very useful to know.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre