[Intel-gfx] [PATCH 08/16] drm/i915: Ivy Bridge has split display and pipe control

[Jesse Barnes]

On Wed, 27 Apr 2011 08:19:21 +0100
Chris Wilson <chris at chris-wilson.co.uk> wrote:

> On Tue, 26 Apr 2011 16:38:46 -0700, Jesse Barnes <jbarnes at virtuousgeek.org> wrote:
> > Ivy Bridge has a similar split display controller to Sandy Bridge, so
> > use HAS_PCH_SPLIT.  And gen7 also has the pipe control instruction, so
> > use HAS_PIPE_CONTROL as well.
> > 
> > Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
> > ---
> >  drivers/gpu/drm/i915/i915_drv.h |    4 ++--
> >  1 files changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 9fbb6fe..e596c10 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -965,8 +965,8 @@ enum intel_chip_family {
> >  #define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)
> >  #define I915_HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
> >  
> > -#define HAS_PCH_SPLIT(dev) (IS_GEN5(dev) || IS_GEN6(dev))
> > -#define HAS_PIPE_CONTROL(dev) (IS_GEN5(dev) || IS_GEN6(dev))
> > +#define HAS_PCH_SPLIT(dev) (IS_GEN5(dev) || IS_GEN6(dev) || IS_IVYBRIDGE(dev))
> > +#define HAS_PIPE_CONTROL(dev) (IS_GEN5(dev) || IS_GEN6(dev) || IS_GEN7(dev))
> >  
> >  #define INTEL_PCH_TYPE(dev) (((struct drm_i915_private *)(dev)->dev_private)->pch_type)
> >  #define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT)
> 
> So either we are confident that every future ILK+ continues with the split
> and keeps pipe_control, in which case we do the obvious simplification or
> we make these an actual capability bit before the code becomes a deep
> nesting of predicates again...

No, I expect HAS_PCH_SPLIT won't apply to upcoming gen7 chipsets.  The
cantiga display controller is even used in GMA500, so it really is
separate from render related checks.  We could probably come up with
better names though to make things more readable and consistent.

Jesse