[Intel-gfx] [PATCH 2/3] drm/i915: Force sync command ordering (Gen6+)

[Eric Anholt]

On Sat, 22 Oct 2011 19:41:24 -0700, Ben Widawsky <ben at bwidawsk.net> wrote:
> The docs say this is required for Gen7, and since the bit was added for
> Gen6, we are also setting it there pit pf paranoia. Particularly as
> Chris points out, if PIPE_CONTROL counts as a 3d state packet.
> 
> This was found through doc inspection by Ken and applies to Gen6+;
> 
> Cc: Keith Packard <keithp at keithp.com>
> Reported-by: Kenneth Graunke <kenneth at whitecape.org>
> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
> Reviewed-by: Daniel Vetter <daniel.vetter at ffwll.ch>

Reviewed-by: Eric Anholt <eric at anholt.net>

however, it doesn't appear to help Ivybridge IRQ troubles.
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