[Intel-gfx] [PATCH 2/3] drm/i915: fix rc6 enabling around suspend/resume

[Jesse Barnes]

Enabling RC6 implies setting a graphics context.  Make sure we do that
only after the ring has been enabled, otherwise our ring commands will
hang.

Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
---
 drivers/gpu/drm/i915/i915_drv.c     |    3 +++
 drivers/gpu/drm/i915/i915_suspend.c |    3 ---
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index dbae9c3..a420b08 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -353,6 +353,9 @@ static int i915_drm_thaw(struct drm_device *dev)
 		drm_helper_resume_force_mode(dev);
 	}
 
+	/* Clock gating state */
+	intel_enable_clock_gating(dev);
+
 	intel_opregion_init(dev);
 
 	dev_priv->modeset_on_lid = 0;
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index af53063..147cd96 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -868,9 +868,6 @@ int i915_restore_state(struct drm_device *dev)
 		I915_WRITE (IMR,  dev_priv->saveIMR);
 	}
 
-	/* Clock gating state */
-	intel_enable_clock_gating(dev);
-
 	if (IS_IRONLAKE_M(dev)) {
 		ironlake_enable_drps(dev);
 		intel_init_emon(dev);
-- 
1.7.0.4