[Intel-gfx] [PATCH] agp/intel: Only enlarge the GTT if the DMA-Remapper is not active

Chris Wilson chris at chris-wilson.co.uk
Fri Jan 7 17:51:57 CET 2011


If the DMAR is active, it will prevent accessing the PTE elements beyond
its shadow copy so we are constrained to the original size.

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---

Dave, hopefully this should fix the issue with the DMAR detecting invalid
accesses through PTEs you were seeing earlier.

---
 drivers/char/agp/intel-gtt.c |   25 +++++++++++++++++++------
 1 files changed, 19 insertions(+), 6 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index da81618..19f2317 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -21,6 +21,7 @@
 #include <linux/kernel.h>
 #include <linux/pagemap.h>
 #include <linux/agp_backend.h>
+#include <linux/iommu.h>
 #include <asm/smp.h>
 #include "agp.h"
 #include "intel-agp.h"
@@ -493,10 +494,17 @@ static unsigned int intel_gtt_stolen_size(void)
 	return stolen_size;
 }
 
-static void i965_adjust_pgetbl_size(unsigned int size_flag)
+static void i965_adjust_pgetbl_size(unsigned int size_flag,
+				    bool is_vt)
 {
 	u32 pgetbl_ctl, pgetbl_ctl2;
 
+	/* If the DMA-remapper is enabled, then it will already have
+	 * taken a shadow of the PGETBL and we cannot adjust its size.
+	 */
+	if (is_vt && iommu_found())
+		return;
+
 	/* ensure that ppgtt is disabled */
 	pgetbl_ctl2 = readl(intel_private.registers+I965_PGETBL_CTL2);
 	pgetbl_ctl2 &= ~I810_PGETBL_ENABLED;
@@ -519,17 +527,22 @@ static unsigned int i965_gtt_total_entries(void)
 			     I830_GMCH_CTRL, &gmch_ctl);
 
 	if (INTEL_GTT_GEN == 5) {
+		bool is_vt = false;
+
 		switch (gmch_ctl & G4x_GMCH_SIZE_MASK) {
-		case G4x_GMCH_SIZE_1M:
 		case G4x_GMCH_SIZE_VT_1M:
-			i965_adjust_pgetbl_size(I965_PGETBL_SIZE_1MB);
+			is_vt = true;
+		case G4x_GMCH_SIZE_1M:
+			i965_adjust_pgetbl_size(I965_PGETBL_SIZE_1MB, is_vt);
 			break;
 		case G4x_GMCH_SIZE_VT_1_5M:
-			i965_adjust_pgetbl_size(I965_PGETBL_SIZE_1_5MB);
+			is_vt = true;
+			i965_adjust_pgetbl_size(I965_PGETBL_SIZE_1_5MB, is_vt);
 			break;
-		case G4x_GMCH_SIZE_2M:
 		case G4x_GMCH_SIZE_VT_2M:
-			i965_adjust_pgetbl_size(I965_PGETBL_SIZE_2MB);
+			is_vt = true;
+		case G4x_GMCH_SIZE_2M:
+			i965_adjust_pgetbl_size(I965_PGETBL_SIZE_2MB, is_vt);
 			break;
 		}
 	}
-- 
1.7.2.3




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