[Intel-gfx] [PATCH 7/8] drm/i915/dp: rename dpms_mode to receiver_configured
Jesse Barnes
jbarnes at virtuousgeek.org
Sat Jul 2 00:22:57 CEST 2011
Make its usage a little more clear.
Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
---
drivers/gpu/drm/i915/intel_dp.c | 11 ++++++-----
1 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index d7a8d24..ac6334d 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -50,7 +50,7 @@ struct intel_dp {
bool has_audio;
int force_audio;
uint32_t color_range;
- int dpms_mode;
+ bool receiver_configured; /* set if we *think* there's a receiver */
uint8_t link_bw;
uint8_t lane_count;
uint8_t dpcd[4];
@@ -978,7 +978,7 @@ static void intel_dp_commit(struct drm_encoder *encoder)
if (is_edp(intel_dp))
ironlake_edp_backlight_on(dev);
- intel_dp->dpms_mode = DRM_MODE_DPMS_ON;
+ intel_dp->receiver_configured = true;
}
static void
@@ -997,6 +997,7 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode)
ironlake_edp_panel_off(dev);
if (is_edp(intel_dp) && !is_pch_edp(intel_dp))
ironlake_edp_pll_off(encoder);
+ intel_dp->receiver_configured = false;
} else {
if (is_edp(intel_dp))
ironlake_edp_panel_vdd_on(intel_dp);
@@ -1010,8 +1011,8 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode)
}
if (is_edp(intel_dp))
ironlake_edp_backlight_on(dev);
+ intel_dp->receiver_configured = true;
}
- intel_dp->dpms_mode = mode;
}
/*
@@ -1823,7 +1824,7 @@ intel_dp_hot_plug(struct intel_encoder *intel_encoder)
{
struct intel_dp *intel_dp = container_of(intel_encoder, struct intel_dp, base);
- if (intel_dp->dpms_mode == DRM_MODE_DPMS_ON)
+ if (intel_dp->receiver_configured)
intel_dp_check_link_status(intel_dp);
}
@@ -1892,7 +1893,7 @@ intel_dp_init(struct drm_device *dev, int output_reg)
return;
intel_dp->output_reg = output_reg;
- intel_dp->dpms_mode = -1;
+ intel_dp->receiver_configured = false;
intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
if (!intel_connector) {
--
1.7.4.1
More information about the Intel-gfx
mailing list