[Intel-gfx] [PATCH] agp/intel: Fix typo in G4x_GMCH_SIZE_VT_2M
Chris Wilson
chris at chris-wilson.co.uk
Fri Jul 8 12:48:50 CEST 2011
Konstantin Belousov found an error in the define of G4x_GMCH_SIZE_VT_2M
relative to the GMCH specs, and confirmed that indeed one of his users
with a Q45 reports 0xb not 0xc for a 2/2MiB GATT.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Konstantin Belousov <kostikbel at gmail.com>
Cc: Daniel Vetter <daniel.vetter at ffwll.ch>
---
drivers/char/agp/intel-agp.h | 7 ++++---
1 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h
index 999803c..23d9f5d 100644
--- a/drivers/char/agp/intel-agp.h
+++ b/drivers/char/agp/intel-agp.h
@@ -90,9 +90,10 @@
#define G4x_GMCH_SIZE_MASK (0xf << 8)
#define G4x_GMCH_SIZE_1M (0x1 << 8)
#define G4x_GMCH_SIZE_2M (0x3 << 8)
-#define G4x_GMCH_SIZE_VT_1M (0x9 << 8)
-#define G4x_GMCH_SIZE_VT_1_5M (0xa << 8)
-#define G4x_GMCH_SIZE_VT_2M (0xc << 8)
+#define G4x_GMCH_SIZE_VT_EN (0x8 << 8)
+#define G4x_GMCH_SIZE_VT_1M (G4x_GMCH_SIZE_1M | G4x_GMCH_SIZE_VT_EN)
+#define G4x_GMCH_SIZE_VT_1_5M (0x2 | G4x_GMCH_SIZE_VT_EN) /* no nonVT equiv */
+#define G4x_GMCH_SIZE_VT_2M (G4x_GMCH_SIZE_2M | G4x_GMCH_SIZE_VT_EN)
#define GFX_FLSH_CNTL 0x2170 /* 915+ */
--
1.7.5.4
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