[Intel-gfx] [PATCH fixes] drm/i915: Fix unfenced alignment on pre-G33 hardware
Chris Wilson
chris at chris-wilson.co.uk
Mon Jun 6 22:56:51 CEST 2011
On Mon, 06 Jun 2011 11:09:30 -0700, Keith Packard <keithp at keithp.com> wrote:
> On Mon, 06 Jun 2011 18:50:16 +0100, Chris Wilson <chris at chris-wilson.co.uk> wrote:
>
> > Hah. Anyway it is actually irrelevant as it turns out, the kernel is broken
> > with any per-surface tiling on gen2/gen3.
>
> Right, seems like we need to signal user space that tiling works now,
> which should involve a new ioctl of some form?
So PARAM_HAS_PER_SURFACE_TILING and re-enable fencing for render
operations on gen2/3.
> > Yes, I can. But the simple bug fix doesn't fix anything without the other
> > chunk. Do you still want it split?
>
> Isn't it a general bug? We're asking for an alignment value using the
> wrong tiling mode when changing tiling modes.
Indeed. I just can't test the patch independently since the hangs look
identical.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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