[Intel-gfx] [PATCH 14/16] intel: Add is_855ish for handling 855 and 865 specific lod clamping

[Eric Anholt]

On Tue, 07 Jun 2011 21:22:28 +0100, Chris Wilson <chris at chris-wilson.co.uk> wrote:
> On Tue,  7 Jun 2011 15:34:19 -0400, Kristian Høgsberg <krh at bitplanet.net> wrote:
> >  struct intel_chipset {
> >     int gen;
> > -   GLboolean is_945, is_g4x;
> > +   GLboolean is_855ish, is_945, is_g4x;
> >  
> >     /* WM maximum threads is number of EUs times number of threads per EU. */
> >     int wm_max_threads;
> 
> This can be handled by adding a few more bits per-gen. I found using
>   20 830/845
>   21 855/865
>   30 915
>   31 945
>   33 g33 + pnv
>   40 965
>   45 g4x
>   50 ilk
>   60 snb
>   ...to infinity and beyond...
> works quite well for specifying render capabilities for gen2/3/4.

I never liked this.  I much prefer the extra knobs for the few weird
cases (there's *so* little that's g33 as opposed to 945-specific, for
example).
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