[Intel-gfx] Shader debugging

[Ben Widawsky]

The following patches enable GEN hardware shader debugging features. This is
for >= GEN6 only.

The patches are not usable without patches to the DDX as well as Mesa.
Furthermore currently a kernel ioctl is required (more on that later).  As
these are all in tools, I figure I would post these now while I continue
cleaning up the other patches. Furthermore, no interactive debugging is yet
supported.

The system routine has been tested on a fragment shader (though it
should work for vertex shaders as well).

Here is a brief description of what is missing (ie. not yet ready for
mailing list):
  - DDX state setup needs to cooperate when setting the Instruction
    Base address.
  - Mesa state setup needs to cooperate.
  - Mesa need some way to set breakpoints.
  - Mesa register allocation needs modification.
  - Kernel ioctl to set the system routine instruction pointer

Here is what is working in the current implementation:
  - System routine upload (done in Kernel IOCTL currently)
  - Basic system routine
  - Coherent EU/CPU communication (while ring is frozen)
  - EU architectural state saving (just MRF 1-15, GRF 0-15, SR, and CR), and
    saved into CPU visible space.
  - Tool to read architectural state (mostly for reference).

Here is what is planned next:
  - Clean up and send out what I have for Mesa, DDX, and kernel (even
    though I know most of those need changes anyway).
  - When I started this work nobody was using the instuction base
    pointer, so I need to cooperate more closely with that now.
  - Work on EU side communication (do different things based on CPU
    commands).
  - Change eviction macro to a loop

There's probably more which I'm forgetting right now. The 4th patch is the
gigantic, not sure how to split it up, patch. I will probably add an extremely,
more simpler system routine for basic sanity testing.