[Intel-gfx] [PATCH] [WIP] i965: Use up to 80 WM threads on GT2.
Shuang He
shuang.he at intel.com
Tue Mar 29 02:32:04 CEST 2011
On 2011/3/29 6:22, Ian Romanick wrote:
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> On 03/28/2011 10:55 AM, Eric Anholt wrote:
>
>> Here's an idea for an SNB performance improvement from the specs. It
>> says that on GT2 you should be able to use 80 threads if "WIZ Hashing
>> Disable in GT_MODE register enabled". On my system (supposedly GT2),
>> that bit (bit 6 of 0x20d0) is unset. In testing, with intel_reg_write
>> 0x20d0 0x00400040 (it only successfully took once, I suspect due to
>> FORCEWAKE, which also means that I can't necessarily trust that the
>> bit was unset originally), I got only hangs from 3D.
> So, we're currently using too many threads in some cases? Could this be
> related to bug #35730? In that case the failure seems to be limited to
> SugarBay. I believe that's GT1, but I can never get the code names for
> these chips straight.
The system environment description section in bug #35730 already mention
it's rev09 GT1
Thanks
--Shuang
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