[Intel-gfx] [PATCH v5] drm/i915: pass ELD to HDMI/DP audio driver

Wu Fengguang fengguang.wu at intel.com
Thu Nov 10 08:55:22 CET 2011


On Thu, Nov 10, 2011 at 03:33:50PM +0800, Wu Fengguang wrote:
> Wow I reproduced the bug and got a very interesting dmesg:
> 
> gfx =>        [ 4561.287980] [drm:intel_write_eld], ELD on [CONNECTOR:12:HDMI-A-2], [ENCODER:11:TMDS-11]
> gfx =>        [ 4561.291730] [drm:ironlake_write_eld], ELD on pipe B
> gfx =>        [ 4561.293804] [drm:ironlake_write_eld], Audio directed to unknown port
> gfx =>        [ 4561.295273] [drm:ironlake_write_eld],
>       alsa => [ 4561.295486] HDMI hot plug event: Codec=3 Pin=6 Presence_Detect=1 ELD_Valid=0
>       alsa => [ 4561.295564] HDMI status: Codec=3 Pin=6 Presence_Detect=1 ELD_Valid=0
> gfx =>        [ 4561.300020] ELD size 13
>       alsa => [ 4561.300697] HDMI hot plug event: Codec=3 Pin=6 Presence_Detect=1 ELD_Valid=1
>       alsa => [ 4561.303322] HDMI status: Codec=3 Pin=6 Presence_Detect=1 ELD_Valid=1
>       alsa => [ 4561.311120] ALSA hda_eld.c:259 HDMI: Unknown ELD version 0
>       
> Hey the two parts are interleaved!
> 
> But still it should work all fine, since the gfx driver does
> 
>         set ELD_Valid = 0
>         write ELD
>         set ELD_Valid = 1
> 
> So the audio driver would read the correct ELD unless the ELD content
> and flag writes are somehow _reordered_ underneath. Or the ELD content
> writes take some time to take effect?

Just confirmed that adding 1s delay can fix it!

New dmesg is:

[   48.564923] [drm:drm_crtc_helper_set_mode], [ENCODER:11:TMDS-11] set [MODE:34:]
[   48.567481] [drm:intel_hdmi_mode_set], Enabling HDMI audio on pipe B
[   48.568975] [drm:intel_write_eld], ELD on [CONNECTOR:12:HDMI-A-2], [ENCODER:11:TMDS-11]
[   48.571728] [drm:ironlake_write_eld], ELD on pipe B
[   48.572882] [drm:ironlake_write_eld], Audio directed to unknown port
[   48.575252] [drm:ironlake_write_eld], 
[   48.575400] HDMI hot plug event: Codec=3 Pin=6 Presence_Detect=1 ELD_Valid=0
[   48.575487] HDMI status: Codec=3 Pin=6 Presence_Detect=1 ELD_Valid=0
[   48.580116] ELD size 13
[   48.580795] HDMI hot plug event: Codec=3 Pin=6 Presence_Detect=1 ELD_Valid=1
[   48.583340] HDMI status: Codec=3 Pin=6 Presence_Detect=1 ELD_Valid=1
[   48.632514] [drm:intel_wait_for_vblank], vblank wait timed out
[   48.685322] [drm:intel_wait_for_vblank], vblank wait timed out
[   48.687438] [drm:ironlake_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
[   48.687438] [drm:ironlake_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
[   48.690106] [drm:ironlake_update_wm], FIFO watermarks For pipe B - plane 42, cursor: 6
[   48.745204] [drm:intel_wait_for_vblank], vblank wait timed out
[   48.798035] [drm:intel_wait_for_vblank], vblank wait timed out
[   48.799633] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x100
[   48.802686] [drm:ironlake_fdi_link_train], FDI train 1 done.
[   48.805103] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x600
[   48.807246] [drm:ironlake_fdi_link_train], FDI train 2 done.
[   48.809426] [drm:ironlake_fdi_link_train], FDI train done
[   48.813960] [drm:intel_update_fbc], 
[   48.814782] [drm:drm_crtc_helper_set_config], Setting connector DPMS state to on
[   48.818093] [drm:drm_crtc_helper_set_config],        [CONNECTOR:12:HDMI-A-2] set DPMS on
[   48.828633] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
[   49.618962] HDMI: detected monitor RX-V1800 at connection type HDMI
[   49.621013] HDMI: available speakers: FL/FR LFE FC RL/RR RC RLC/RRC
[   49.622304] HDMI: supports coding type LPCM: channels = 2, rates = 32000 44100 48000 96000 176400 192000 384000, bits = 16 20 24
[   49.625069] HDMI: supports coding type LPCM: channels = 8, rates = 32000 44100 48000 96000 176400 192000 384000, bits = 16 20 24
[   49.628535] HDMI: supports coding type AC-3: channels = 6, rates = 32000 44100 48000, max bitrate = 640000
[   49.630810] HDMI: supports coding type DTS: channels = 7, rates = 32000 44100 48000 96000 176400, max bitrate = 1536000
[   49.633148] HDMI: supports coding type DSD (One Bit Audio): channels = 6, rates = 44100
[   49.635039] HDMI: supports coding type E-AC-3/DD+ (Dolby Digital Plus): channels = 8, rates = 44100 48000
[   49.637130] HDMI: supports coding type MLP (Dolby TrueHD): channels = 8, rates = 48000 176400 384000
[   49.639172] HDMI: supports coding type DTS-HD: channels = 8, rates = 48000 176400 384000

Thanks,
Fengguang

-------------- next part --------------
Subject: 
Date: Thu Nov 10 15:41:11 CST 2011


Signed-off-by: Wu Fengguang <fengguang.wu at intel.com>
---
 sound/pci/hda/hda_eld.c |    3 +++
 1 file changed, 3 insertions(+)

--- linux.orig/sound/pci/hda/hda_eld.c	2011-11-10 15:39:43.000000000 +0800
+++ linux/sound/pci/hda/hda_eld.c	2011-11-10 15:52:09.000000000 +0800
@@ -23,6 +23,7 @@
 
 #include <linux/init.h>
 #include <linux/slab.h>
+#include <linux/delay.h>
 #include <sound/core.h>
 #include <asm/unaligned.h>
 #include "hda_codec.h"
@@ -326,6 +327,8 @@ int snd_hdmi_get_eld(struct hdmi_eld *el
 	if (!eld->eld_valid)
 		return -ENOENT;
 
+	msleep(1000);
+
 	size = snd_hdmi_get_eld_size(codec, nid);
 	if (size == 0) {
 		/* wfg: workaround for ASUS P5E-VM HDMI board */


More information about the Intel-gfx mailing list