[Intel-gfx] [PATCH] drm/i915: Seperate fence pin counting from normal bind pin counting

[Daniel Vetter]

On Sun, Nov 13, 2011 at 11:00:22AM +0000, Chris Wilson wrote:
> In order to correctly account for reserving space in the GTT and fences
> for a batch buffer, we need to independently track whether the fence is
> pinned due to a fenced GPU access in the batch from from whether the
> buffer is pinned in the aperture. Currently we count the fenced as
> pinned if the buffer has already been seen in the execbuffer. This leads
> to a false accounting of available fence registers, causing frequent
> mass evictions. Worse, if coupled with the change to make
> i915_gem_object_get_fence() report EDADLK upon fence starvation, the
> batchbuffer can fail with only one fence required...
> 
> Fixes intel-gpu-tools/tests/gem_fenced_exec_thrash
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=38735
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Reviewed-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> Tested-by: Paul Neumann <paul104x at yahoo.de>
> Cc: stable at kernel.org

How embarassing, I've re-reviewed the wrong patch without noticing.
Anyway, still looks good and I like the pin_count moved to the fence quite
a bit more ...
Reviewed-by: Daniel Vetter <daniel.vetter at ffwll.ch>
-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48