[Intel-gfx] [PATCH 0/8] aliasing ppgtt support

[Daniel Vetter]

On Sat, Nov 26, 2011 at 02:27:52PM +0100, Daniel Vetter wrote:
> Hi all,
> 
> This series implements ppgtt support that aliases the global gtt, i.e. ppgtt
> address space is not managed independantly, yet, this only enables the hw
> support.
> 
> Do not ask why it took more than a month to beat this into shape.
> 
> There are two reasons why 2-level ppgtt is actually faster than single level
> global gtt:
> a) The first ppgtt level is loaded into a special on-chip cache, eliminating the
> load latency for it.
> b) ppgtt ptes can be loaded with llc caching, see the ECOCHK register. Disabling
> this removes any ppgtt related speedups.
> 
> Speedups range up to 10-15%, especially on ivb the raw blitter throughput
> increases quite a bit. Generally up to 5% for workloads resembling more random
> access patterns.
> 
> Patches apply on top of my my-next branch, but should apply anywhere safe for a
> trivial conflict with the debugfs stuff.
> 
> Reviews, test reports and flames highly welcome.

Chris noted quite a few style issues on irc (that's what you get when a
patch series gets mangled for more than a month ;-) Update patches pushed
to my ppgtt branch. I'll resend the entire pile when I've written the lazy
global gtt binding patches on top of this, doesn't look like much fuzz and
should help quite a bit for bind/unbind heavy workloads.
-Daniel
-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48