[Intel-gfx] [PATCH] drm/i915: Avoid reading through unaccessible PTEs during an error event

[Chris Wilson]

We need to sanity check that the buffer is actually bound into the
mappable range of the GTT prior to reading it back through the GTT with
the CPU. Fortuitously, the only buffers we have been interested in so
far are constrained to be in the mappable region in order to handle
potential relocations. However, this can be relaxed in future and given
that the purpose is to read back following an error we should be extra
careful and not assume everything is safe.

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_irq.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 26ac3bf..9b38226 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -708,7 +708,7 @@ i915_error_object_create(struct drm_i915_private *dev_priv,
 	int page, page_count;
 	u32 reloc_offset;
 
-	if (src == NULL || src->pages == NULL)
+	if (src == NULL || src->pages == NULL || !src->map_and_fenceable)
 		return NULL;
 
 	page_count = src->base.size / PAGE_SIZE;
-- 
1.7.7.3