[Intel-gfx] [PATCH] drm/i915: flush overlay regfile writes

[Chris Wilson]

On Tue, 29 Nov 2011 18:32:18 +0100, Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
> Better be paranoid. The wmb should flush the wc writes, and
> the chipset_flush hopefully flushes any mch buffers. There've been a
> few overlay hangs I've never really diagnosed, unfortunately all the
> reporters disappeared.

One of the worries I've had in the past has been whether we need a wmb()
inside intel_ring_begin() so that all the register writes (assuming we
get WC registers one day) and the WC gtt writes are coherent with
initiating work on the GPU. I attacked
i915_gem_object_flush_gtt_write_domain() instead in the belief that
would be sufficient. I think this demonstrates I was wrong. However, you
could argue that the overlay code is circumventing the cache domain
tracking of gem objects established for this very purpose. Though
calling i915_gem_object_set_to_gtt_domain(obj,true) in map and
i915_gem_object_flush_gtt_write_domain() in unmap might be overkill...
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre