[Intel-gfx] Garbage on screen when switching resolution after BIOS post
Keith Packard
keithp at keithp.com
Tue Oct 4 17:38:33 CEST 2011
On Tue, 4 Oct 2011 17:53:08 +0800, meteor <meteor at ms1.url.com.tw> wrote:
> Please refer to the VDD power monitoring image:
> http://imageshack.us/photo/my-images/827/auoi.jpg/
Nice picture. As Daniel mentioned, you'll want to try my eDP power
sequencing changes and see what they do.
I'm not sure they will though -- my understanding of the eDP spec is
that if we drop VDD, we must hold it low for the specified interval, but
I haven't found anything saying that we must lower VDD when disabling
and re-enabling the display.
Given that the VDD low interval is often quite long (500ms or more), I'd
prefer to avoid doing this when booting the operating system.
I wonder if the final solution will be to move the whole DP link
training and eDP power sequencing stuff to a separate thread to keep
that out of the sequential path of the mode setting code which is run
when the driver loads.
--
keith.packard at intel.com
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