[Intel-gfx] [PATCH 3/4] drm/i915: split refclk code out of ironlake_crtc_mode_set

[Keith Packard]

On Wed,  5 Oct 2011 10:25:20 -0700, Jesse Barnes <jbarnes at virtuousgeek.org> wrote:

> +	/* PCH ports use a 120 MHz refclk */
> +	if (!edp_encoder || intel_encoder_is_pch_edp(&edp_encoder->base))
> +		return 120000;
> +	else
> +		return 96000;
> +}

I can't find any documentation that says that there is any 96MHz refclk
on PCH hardware.

-- 
keith.packard at intel.com
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