[Intel-gfx] i915 module does not find 82865G if configured as secondary

Mon Oct 10 22:32:38 CEST 2011

This would be great, but...

I have just tested the patches and it really messes up the system.

On the first boot I got a shell and was able to to a dmesg:
...
[   46.775935] [drm] Initialized drm 1.1.0 20060810
[   46.926398] i915 0000:00:02.0: enabling device (0000 -> 0003)
[   46.926412] i915 0000:00:02.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
[   46.926422] i915 0000:00:02.0: setting latency timer to 64
[   46.932858] [drm] set up 31M of stolen space
[   46.933087] i915 0000:00:02.0: BAR 6: can't allocate resource (bogus
alignment) [0x0-0x0] flags 0x0
[   46.933093] [drm] failed to find VBIOS tables
[   46.978294] [drm] initialized overlay support
[   47.308831] Console: switching to colour frame buffer device 160x64
[   47.308849] fb0: inteldrmfb frame buffer device
[   47.308853] registered panic notifier
[   47.308868] [drm] Initialized i915 1.6.0 20080730 for 0000:00:02.0 on
minor 0
[   47.323940] vgaarb: this pci device is not a vga device
[   47.355806] render error detected, EIR: 0x00000010
[   47.355815] [drm:i915_handle_error] *ERROR* EIR stuck: 0x00000010,
masking
[   47.355835] render error detected, EIR: 0x00000010
[   48.112726] vgaarb: this pci device is not a vga device
[   48.568008] tap0: no IPv6 routers present
[   50.673130] lp0: using parport0 (interrupt-driven).
[   50.842153] [drm:i915_hangcheck_elapsed] *ERROR* Hangcheck timer
elapsed... GPU hung
[   50.842166] render error detected, EIR: 0x00000000
[   50.842200] [drm:i915_do_wait_request] *ERROR* i915_do_wait_request
returns -5 (awaiting 1 at 0)
[   51.100509] ppdev: user-space parallel port driver
[   51.436065] EXT3-fs error (device sda2): ext3_lookup: deleted inode
referenced: 157299
[   51.436076] Aborting journal on device sda2.
[   51.436296] Remounting filesystem read-only
...

On the second boot the computer hung altogether.

Xorg seemed to initialise but ended up with this (last) line in the log
file:
(EE) intel(0): Detected a hung GPU, disabling acceleration.

I have attached the log for completeness.

So I believe for the older kernel there would be more to patch than
this... I have attached the diff of the changes I have done so far -
should be the two patches Chris had listed.

Compared against the sources from:
ii  linux-source-2.6.32                    
2.6.32-38                               Linux kernel source for version
2.6.32 with Debian patches

Were the changes I did correct? Just in case I messed things up myself...

Yours,
Tempura.

On Mon, 10 Oct 2011 21:06:27 +0200, Julien Cristau wrote:
> On Sun, Oct  9, 2011 at 19:36:27 +0100, Chris Wilson wrote:
>
>> On Sun, 9 Oct 2011 14:44:30 +0200, Daniel Vetter <daniel at ffwll.ch> wrote:
>>> On Sun, Oct 09, 2011 at 01:07:25PM +0200, Tempura San wrote:
>>>> Here is the output of lspci -nn:
>>>>
>>>> 00:00.0 Host bridge [0600]: Intel Corporation 82865G/PE/P DRAM
>>>> Controller/Host-Hub Interface [8086:2570] (rev 02)
>>>> 00:02.0 Display controller [0380]: Intel Corporation 82865G Integrated
>>>> Graphics Controller [8086:2572] (rev 02)
>>> The issue seems to be that the igd isn't a VGA pci class device anymore
>>> when used as secondary. The below (untested) patch should allow to still
>>> bind the i915 driver. Please test how far that gets us.
>> Note the old kernel, and probable lack of:
>>
>> commit 934f992c763ae1e5eefcce8af769c16444085df7
>> Author: Chris Wilson <chris at chris-wilson.co.uk>
>> Date:   Thu Jan 20 13:09:12 2011 +0000
>>
>>     drm/i915: Recognise non-VGA display devices
>>     
>>     Starting with SandyBridge (though possible with earlier hacked BIOSes),
>>     the BIOS may initialise the IGFX as secondary to a discrete GPU. Prior,
>>     it would simply disable the integrated GPU. So we adjust our PCI class
>>     mask to match any DISPLAY_CLASS device.
>>     
>>     In such a configuration, the IGFX is not a primary VGA controller and
>>     so should not take part in VGA arbitration, and the error return from
>>     vga_client_register() is expected.
>>     
>>     Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
>>     Cc: stable at kernel.org
>>
>> and
>>
>> commit 5fe49d86f9d01044abf687a8cd21edef636d58aa
>> Author: Chris Wilson <chris at chris-wilson.co.uk>
>> Date:   Tue Feb 1 19:43:02 2011 +0000
>>
>>     drm/i915: Only bind to function 0 of the PCI device
>>     
>>     Early chipsets (gen2/3) used function 1 as a placeholder for multi-head.
>>     We used to ignore these since they were not assigned to
>>     PCI_CLASS_DISPLAY_VGA. However with 934f992c7 we attempt to bind to all
>>     Intel PCI_CLASS_DISPLAY devices (and functions) to work in multi-gpu
>>     systems. This fails hard on gen2/3.
>>     
>>     Reported-by: Ferenc W??gner <wferi at niif.hu>
>>     Tested-by: Ferenc W??gner <wferi at niif.hu>
>>     Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=28012
>>     Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
>>     Cc: stable at kernel.org
> I'll try to get these included into a future squeeze kernel update.
> Thanks.
>
> Cheers,
> Julien
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