[Intel-gfx] [PATCH 2/4] drm/i915: Force sync command ordering (Gen6+)

[Daniel Vetter]

On Wed, Oct 12, 2011 at 03:56:20PM -0700, Ben Widawsky wrote:
> The docs say this is required for Gen7, and since the bit was added for
> Gen6, we are also setting it there pit pf paranoia. Particularly as
> Chris points out, if PIPE_CONTROL counts as a 3d state packet.
> 
> This was found through doc inspection by Ken and applies to Gen6+;
> 
> Reported-by: Kenneth Graunke <kenneth at whitecape.org>
> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>

Now even I get it, thanks to the comment ;-)

Reviewed-by: Daniel Vetter <daniel.vetter at ffwll.ch>
-- 
Daniel Vetter
Mail: daniel at ffwll.ch
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