[Intel-gfx] [PATCH 07/14] drm/i915: add PLL sharing support to handle 3 pipes
Keith Packard
keithp at keithp.com
Fri Oct 21 08:18:06 CEST 2011
On Wed, 19 Oct 2011 08:12:08 -0700, Jesse Barnes <jbarnes at virtuousgeek.org> wrote:
> /* PCH eDP needs FDI, but CPU eDP does not */
> - if (!has_edp_encoder || intel_encoder_is_pch_edp(&has_edp_encoder->base)) {
> + if (!intel_crtc->no_pll &&
> + (!has_edp_encoder ||
> + intel_encoder_is_pch_edp(&has_edp_encoder->base))) {
> I915_WRITE(PCH_FP0(pipe), fp);
> I915_WRITE(PCH_DPLL(pipe), dpll & ~DPLL_VCO_ENABLE);
>
> POSTING_READ(PCH_DPLL(pipe));
> udelay(150);
> + } else {
> + if (dpll == (I915_READ(PCH_DPLL(0)) & 0x7fffffff) &&
> + fp == I915_READ(PCH_FP0(0))) {
> + intel_crtc->use_pll_a = true;
> + DRM_DEBUG_KMS("using pipe a dpll\n");
> + } else if (dpll == (I915_READ(PCH_DPLL(1)) & 0x7fffffff) &&
> + fp == I915_READ(PCH_FP0(1))) {
> + intel_crtc->use_pll_a = false;
> + DRM_DEBUG_KMS("using pipe b dpll\n");
> + } else {
> + DRM_DEBUG_KMS("no matching PLL configuration for pipe 2\n");
> + return -EINVAL;
> + }
This hunk breaks eDP nicely -- you end up in the 'else' clause still
looking for a DPLL to use.
Here's my suggested replacement:
/* PCH eDP needs FDI, but CPU eDP does not */
- if (!has_edp_encoder || intel_encoder_is_pch_edp(&has_edp_encoder->base)) {
- I915_WRITE(PCH_FP0(pipe), fp);
- I915_WRITE(PCH_DPLL(pipe), dpll & ~DPLL_VCO_ENABLE);
-
- POSTING_READ(PCH_DPLL(pipe));
- udelay(150);
+ if (!intel_crtc->no_pll) {
+ if (!has_edp_encoder ||
+ intel_encoder_is_pch_edp(&has_edp_encoder->base)) {
+ I915_WRITE(PCH_FP0(pipe), fp);
+ I915_WRITE(PCH_DPLL(pipe), dpll & ~DPLL_VCO_ENABLE);
+
+ POSTING_READ(PCH_DPLL(pipe));
+ udelay(150);
+ }
+ } else {
+ if (dpll == (I915_READ(PCH_DPLL(0)) & 0x7fffffff) &&
+ fp == I915_READ(PCH_FP0(0))) {
+ intel_crtc->use_pll_a = true;
+ DRM_DEBUG_KMS("using pipe a dpll\n");
+ } else if (dpll == (I915_READ(PCH_DPLL(1)) & 0x7fffffff) &&
+ fp == I915_READ(PCH_FP0(1))) {
+ intel_crtc->use_pll_a = false;
+ DRM_DEBUG_KMS("using pipe b dpll\n");
+ } else {
+ DRM_DEBUG_KMS("no matching PLL configuration for pipe 2\n");
+ return -EINVAL;
+ }
}
--
keith.packard at intel.com
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