[Intel-gfx] [PATCH 1/3] drm/i915: Ivybridge still has fences!
Kenneth Graunke
kenneth at whitecape.org
Sun Oct 23 22:45:21 CEST 2011
On 10/23/2011 04:23 AM, Chris Wilson wrote:
> Regardless of the outcome of Jesse's request for an if-ladder, the
> substance of the patches look sound.
>
> However, I remain unconvinced that there are 32 fence registers on IVB.
> Daniel's evidence is based upon the size of the register map (and not
> on the BSPEC explicitly stating a change to 32 ;-), but most tellingly
> the bitfields for fence-number in other registers have not been updated -
> so we can only safely allocated the first 16 anyway...
> (For instance, FBC_CTL).
> -Chris
It sure looks like it has 32 fence registers: BSpec vol1g GT Interface
Register [DevIVB] / GT Interface Register DevIVB / System Agent Config
Space lists FENCE0 through FENCE31. The simulator seems to indicate
this as well.
You're right that FBC_CTL still only has 4 bits for selecting a fence,
but notably, in the latest (WIP) version of the BSpec, it says "This
field must be programmed to 0000b." I'm not sure how it's supposed to
work now, but likely something has changed.
More information about the Intel-gfx
mailing list