[Intel-gfx] [PATCH] drm/i915: specify the address of the semaphore register for comparison

[Chris Wilson]

On Wed, 21 Sep 2011 07:25:03 -0700, Ben Widawsky <ben at bwidawsk.net> wrote:
> On Wed, 21 Sep 2011 12:42:22 +0100
> Chris Wilson <chris at chris-wilson.co.uk> wrote:
> > ---
> >  drivers/gpu/drm/i915/intel_ringbuffer.c |    3 ++-
> >  1 files changed, 2 insertions(+), 1 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
> > b/drivers/gpu/drm/i915/intel_ringbuffer.c index 5fa3d99..6b9790e
> > 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > @@ -359,7 +359,8 @@ intel_ring_sync(struct intel_ring_buffer *ring,
> >  			intel_ring_sync_index(ring, to) << 17 |
> >  			MI_SEMAPHORE_COMPARE);
> >  	intel_ring_emit(ring, seqno);
> > -	intel_ring_emit(ring, 0);
> > +	intel_ring_emit(ring,
> > +			RING_SYNC_0(to->mmio_base) +
> > 4*intel_ring_sync_index(ring,to)); intel_ring_emit(ring, MI_NOOP);
> >  	intel_ring_advance(ring);
> >  
> 
> I'm sort of afraid this is just papering over the issue, ie. the mmio
> access is just adding delay that happens to make it work. I think we
> should follow up with devs on this one.

In the broken English from the spec in front of me:

PointerBitFieldName/MMIO Register Address
Project: All
Address: GraphicsVirtualAddress[31:2]
Surface Type: Semaphore
if Compare Register bit[18] is set, this field if the Graphics Memory Address of the 32 bit value for the semaphore.
If Compare Register bit[18] is cleared, this field is the MMIO address of the register for the semaphore.

I'm embarrassed to have only set the field for Update and not Compare.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre