[Intel-gfx] [PATCH 2/5] drm/i915: read full receiver capability field during DP hot plug

[Chris Wilson]

On Thu, 22 Sep 2011 11:15:58 +0530, Jesse Barnes <jbarnes at virtuousgeek.org> wrote:
> Read link status first, followed by the full DPCD receiver cap field
> rather than just the first 8 bytes.
> 
> Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/i915_irq.c |    2 ++
>  drivers/gpu/drm/i915/intel_dp.c |    4 ++--
>  2 files changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 02f96fd..80b49cc 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -530,6 +530,7 @@ static irqreturn_t ivybridge_irq_handler(DRM_IRQ_ARGS)
>  		if (pch_iir & SDE_HOTPLUG_MASK_CPT)
>  			queue_work(dev_priv->wq, &dev_priv->hotplug_work);
>  		pch_irq_handler(dev);
> +		I915_WRITE(PCH_PORT_HOTPLUG, I915_READ(PCH_PORT_HOTPLUG));
>  	}
>  
>  	if (pm_iir & GEN6_PM_DEFERRED_EVENTS) {
> @@ -629,6 +630,7 @@ static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS)
>  		if (pch_iir & hotplug_mask)
>  			queue_work(dev_priv->wq, &dev_priv->hotplug_work);
>  		pch_irq_handler(dev);
> +		I915_WRITE(PCH_PORT_HOTPLUG, I915_READ(PCH_PORT_HOTPLUG));
>  	}

This is a seperate chunk to the commit message.

>  
>  	if (de_iir & DE_PCU_EVENT) {
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 0feae90..01848f9 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -36,7 +36,7 @@
>  #include "i915_drv.h"
>  #include "drm_dp_helper.h"
>  
> -
> +#define DP_RECEIVER_CAP_SIZE	0xf
>  #define DP_LINK_STATUS_SIZE	6
>  #define DP_LINK_CHECK_TIMEOUT	(10 * 1000)
>  
> @@ -53,7 +53,7 @@ struct intel_dp {
>  	int dpms_mode;
>  	uint8_t link_bw;
>  	uint8_t lane_count;
> -	uint8_t dpcd[8];
> +	uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
>  	struct i2c_adapter adapter;
>  	struct i2c_algo_dp_aux_data algo;
>  	bool is_pch_edp;

So I'm not seeing the quick check followed by the full read as
described.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre