[Intel-gfx] [PATCH 6/9] drm/i915: Fix PCH SSC reference clock settings

[Keith Packard]

On Tue, 27 Sep 2011 17:47:10 +0100, Chris Wilson <chris at chris-wilson.co.uk> wrote:
> On Mon, 26 Sep 2011 23:11:43 -0700, Keith Packard <keithp at keithp.com> wrote:
> > The PCH refclk settings are global, so we need to look at all of the
> > encoders, not just the current encoder when deciding how to configure
> > it. Also, handle systems with more than one panel (any combination of
> > PCH/non-PCH eDP and LVDS).
> 
> As I read it, this sets the refclk not on the active configuration, but
> on all the hardware detected for the system whether enabled or not.

Correct. We cannot randomly turn ref clocks on/off without also
disconnecting them from the PLLs that they drive.

What we could do is figure out which of the two clocks need to be
enabled and modify the mode set code to turn them on when needed before
setting the mode, and then turn them off after, when they aren't
needed. This would leave them off until needed, which might be nice?

This will make changing the driver to not disable the panel at startup
time harder; we'll need to switch the panel to the non-SSC reference,
turn the SSC reference off, reconfigure it and then switch the panel
back to the SSC reference. That's a project for a future change though.

> There are two basic changes here, the cleanup and improvement to the logic
> based on what type of output is connected and the second change to
> determine which outputs are active.

Right, the logic fixes ensure that the clocks are programmed in the
right sequence and that LVDS, eDP and pch-EDP all get SSC as necessary.

The change in dealing with the outputs means that the clocks are
programmed based not on which outputs are active, but on all possible
outputs, ensuring that the programming never changes in response to mode
setting requests.

-- 
keith.packard at intel.com
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