[Intel-gfx] [PATCH] drm/i915/crt: Only support DPMS On/Off with the PCH registers

[Chris Wilson]

As part of the PCH split, the ability to control CRT standby/suspend
states was defeatured; the bits are now marked reserved and apparently
have no effect.

Reported-by: Ouping Zhang <ouping.zhang at intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48491
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/intel_crt.c |   24 ++++++++++++++++++------
 1 file changed, 18 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 70b0f1a..039f101 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -55,18 +55,30 @@ static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
 			    struct intel_crt, base);
 }
 
+static void intel_pch_crt_dpms(struct drm_encoder *encoder, int mode)
+{
+	struct drm_device *dev = encoder->dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	u32 val;
+
+	val = I915_READ(PCH_ADPA);
+	if (mode == DRM_MODE_DPMS_ON)
+		val |= ADPA_DAC_ENABLE;
+	else
+		val &= ~ADPA_DAC_ENABLE;
+	I915_WRITE(PCH_ADPA, val);
+}
+
 static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
 {
 	struct drm_device *dev = encoder->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	u32 temp, reg;
+	u32 temp;
 
 	if (HAS_PCH_SPLIT(dev))
-		reg = PCH_ADPA;
-	else
-		reg = ADPA;
+		return intel_pch_crt_dpms(encoder, mode);
 
-	temp = I915_READ(reg);
+	temp = I915_READ(ADPA);
 	temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
 	temp &= ~ADPA_DAC_ENABLE;
 
@@ -85,7 +97,7 @@ static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
 		break;
 	}
 
-	I915_WRITE(reg, temp);
+	I915_WRITE(ADPA, temp);
 }
 
 static int intel_crt_mode_valid(struct drm_connector *connector,
-- 
1.7.9.5