[Intel-gfx] [PATCH 2/7] drm/i915: implement a media hang w/a
ben at bwidawsk.net
Tue Apr 10 23:34:24 CEST 2012
On Tue, Apr 10, 2012 at 02:30:20PM -0700, Ben Widawsky wrote:
> On Sat, Mar 31, 2012 at 11:21:58AM +0200, Daniel Vetter wrote:
> > Contrary to the other clock gating w/a in GEN6_UCGCTL1, this one is
> > actually documented in Bspec, vol1g "GT Interface Registers [SNB]",
> > Section 1.5.1 "UCGCTL1 - Unit Level Clock Gating Control 1".
> > Supposedly this can prevent hangs on the media ring.
> > Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> > ---
> According to my bspec, this is IVB A0 only. ie. nobody should ever need
My bad... needed on SNB only, and not IVB.
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