[Intel-gfx] [PATCH 1/7] drm/i915: implement ColorBlt w/a
daniel at ffwll.ch
Wed Apr 11 12:18:33 CEST 2012
On Tue, Apr 10, 2012 at 03:24:13PM -0700, Ben Widawsky wrote:
> On Sat, Mar 31, 2012 at 11:21:57AM +0200, Daniel Vetter wrote:
> > According to an internal workaround master list, we need to set bit 5
> > of register 9400 to avoid issues with color blits.
> > Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> I'm having a lot of trouble actually tracking this one down in something
> other than the magical spreadsheet.
> So I'll for now, this is only
> Acked-by: Ben Widawsky <ben at bwidawsk.net>
I've picked this up for -fixes, thanks for wrestling through hsd and that
Mail: daniel at ffwll.ch
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