[Intel-gfx] [PATCH 12/14] drm/i915: consolidate ring->flush a bit

[Ben Widawsky]

On Wed, 11 Apr 2012 22:12:57 +0200
Daniel Vetter <daniel.vetter at ffwll.ch> wrote:

> They're indentical, so just kill one. Also give the other a prefix to
> distinguish it from the gen6+ functions - this add_request function is
> not really generic code.
> 
> Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch>

The subject appears to indicate that you're consolidating ring->flush,
but I think you meant add_request.

> ---
>  drivers/gpu/drm/i915/intel_ringbuffer.c |   29 ++++-------------------------
>  1 files changed, 4 insertions(+), 25 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 3d32c51..111981a 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -559,27 +559,6 @@ pc_render_add_request(struct intel_ring_buffer *ring,
>  	return 0;
>  }
>  
> -static int
> -render_ring_add_request(struct intel_ring_buffer *ring,
> -			u32 *result)
> -{
> -	u32 seqno = i915_gem_next_request_seqno(ring);
> -	int ret;
> -
> -	ret = intel_ring_begin(ring, 4);
> -	if (ret)
> -		return ret;
> -
> -	intel_ring_emit(ring, MI_STORE_DWORD_INDEX);
> -	intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
> -	intel_ring_emit(ring, seqno);
> -	intel_ring_emit(ring, MI_USER_INTERRUPT);
> -	intel_ring_advance(ring);
> -
> -	*result = seqno;
> -	return 0;
> -}
> -
>  static u32
>  gen6_ring_get_seqno(struct intel_ring_buffer *ring)
>  {
> @@ -745,7 +724,7 @@ bsd_ring_flush(struct intel_ring_buffer *ring,
>  }
>  
>  static int
> -ring_add_request(struct intel_ring_buffer *ring,
> +i9xx_add_request(struct intel_ring_buffer *ring,
>  		 u32 *result)
>  {
>  	u32 seqno;
> @@ -1317,7 +1296,7 @@ int intel_init_render_ring_buffer(struct drm_device *dev)
>  		ring->irq_put = gen5_ring_put_irq;
>  		ring->irq_enable_mask = GT_USER_INTERRUPT | GT_PIPE_NOTIFY;
>  	} else {
> -		ring->add_request = render_ring_add_request;
> +		ring->add_request = i9xx_add_request;
>  		ring->flush = render_ring_flush;
>  		ring->get_seqno = ring_get_seqno;
>  		ring->irq_get = i9xx_ring_get_irq;
> @@ -1365,7 +1344,7 @@ int intel_render_ring_init_dri(struct drm_device *dev, u64 start, u32 size)
>  		ring->irq_put = gen5_ring_put_irq;
>  		ring->irq_enable_mask = GT_USER_INTERRUPT | GT_PIPE_NOTIFY;
>  	} else {
> -		ring->add_request = render_ring_add_request;
> +		ring->add_request = i9xx_add_request;
>  		ring->flush = render_ring_flush;
>  		ring->get_seqno = ring_get_seqno;
>  		ring->irq_get = i9xx_ring_get_irq;
> @@ -1442,7 +1421,7 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
>  	} else {
>  		ring->mmio_base = BSD_RING_BASE;
>  		ring->flush = bsd_ring_flush;
> -		ring->add_request = ring_add_request;
> +		ring->add_request = i9xx_add_request;
>  		ring->get_seqno = ring_get_seqno;
>  		if (IS_GEN5(dev)) {
>  			ring->irq_enable_mask = GT_BSD_USER_INTERRUPT;