[Intel-gfx] [PATCH 15/29] drm/i915: do not enable PCH PLL on pre-haswell
Eugeni Dodonov
eugeni.dodonov at intel.com
Fri Apr 13 22:08:51 CEST 2012
Signed-off-by: Eugeni Dodonov <eugeni.dodonov at intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 0768f48..e4ebd39 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1437,8 +1437,9 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv,
/* PCH only available on ILK+ */
BUG_ON(dev_priv->info->gen < 5);
- /* Make sure PCH DPLL is enabled */
- assert_pch_pll_enabled(dev_priv, pipe);
+ /* Make sure PCH DPLL is enabled on Pre-Haswell platforms */
+ if (!IS_HASWELL(dev_priv->dev))
+ assert_pch_pll_enabled(dev_priv, pipe);
/* FDI must be feeding us bits for PCH ports */
assert_fdi_tx_enabled(dev_priv, pipe);
--
1.7.10
More information about the Intel-gfx
mailing list