[Intel-gfx] [3.2.y, 3.4.y, 3.5.y] Re: [PATCH] drm/i915: prefer wide & slow to fast & narrow in DP configs

Jonathan Nieder jrnieder at gmail.com
Mon Aug 6 02:12:06 CEST 2012


Hi Ben, Greg, et al,

Please consider

  2514bc510d0c drm/i915: prefer wide & slow to fast & narrow in DP
               configs, 2012-06-21

for application to the 3.2.y, 3.4.y, and 3.5.y trees.

It addresses a regression which bisects to v3.2-rc1~135^2~2^2~7
(drm/i915/dp: Fix the math in intel_dp_link_required, 2011-10-14).
An external display connected through DisplayPort would give "DP no
signal" unless the resolution was overridden to be artificially low.

In discussion of the patch, two worries came up:

 - In older kernels, some machines lied about the maximum number of
   DP lanes.  Luckily v3.2-rc3~8^2~5^2~2 (drm/i915: Use DPCD value for
   max DP lanes, 2011-11-02) solved that, so the patch should be safe.

 - Using the minimum lane count is the right thing to do to minimize
   power consumption.  But a working display is more important.

Peter who discovered the bug tested the patch in June and found it to
work.  He tried it against a 3.2.y tree in July and it still worked.
The patch has been in mainline for about a week and a half and in
Debian's 3.2.y-based kernel since around the same time.  No complaints
yet.

Thoughts of all kinds welcome, as usual.

Hope that helps,
Jonathan



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