[Intel-gfx] [PATCH kernel] drm/i915: add more Haswell PCI IDs
Rodrigo Vivi
rodrigo.vivi at gmail.com
Tue Aug 7 00:17:24 CEST 2012
Reviewed-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>
2012/8/6 Paulo Zanoni <przanoni at gmail.com>:
> From: Paulo Zanoni <paulo.r.zanoni at intel.com>
>
> Also properly indent the HB IDs.
>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
> ---
> drivers/char/agp/intel-agp.h | 39 +++++++++++++++++++++----
> drivers/char/agp/intel-gtt.c | 60 ++++++++++++++++++++++++++++++++++++++-
> drivers/gpu/drm/i915/i915_drv.c | 31 +++++++++++++++++++-
> 3 files changed, 123 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h
> index 5722642..6f007b6 100644
> --- a/drivers/char/agp/intel-agp.h
> +++ b/drivers/char/agp/intel-agp.h
> @@ -239,16 +239,45 @@
> #define PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_GT2_IG 0x016A
> #define PCI_DEVICE_ID_INTEL_VALLEYVIEW_HB 0x0F00 /* VLV1 */
> #define PCI_DEVICE_ID_INTEL_VALLEYVIEW_IG 0x0F30
> -#define PCI_DEVICE_ID_INTEL_HASWELL_HB 0x0400 /* Desktop */
> +#define PCI_DEVICE_ID_INTEL_HASWELL_HB 0x0400 /* Desktop */
> #define PCI_DEVICE_ID_INTEL_HASWELL_D_GT1_IG 0x0402
> #define PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_IG 0x0412
> -#define PCI_DEVICE_ID_INTEL_HASWELL_M_HB 0x0404 /* Mobile */
> +#define PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_PLUS_IG 0x0422
> +#define PCI_DEVICE_ID_INTEL_HASWELL_M_HB 0x0404 /* Mobile */
> #define PCI_DEVICE_ID_INTEL_HASWELL_M_GT1_IG 0x0406
> #define PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_IG 0x0416
> -#define PCI_DEVICE_ID_INTEL_HASWELL_S_HB 0x0408 /* Server */
> +#define PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_PLUS_IG 0x0426
> +#define PCI_DEVICE_ID_INTEL_HASWELL_S_HB 0x0408 /* Server */
> #define PCI_DEVICE_ID_INTEL_HASWELL_S_GT1_IG 0x040a
> #define PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_IG 0x041a
> -#define PCI_DEVICE_ID_INTEL_HASWELL_SDV 0x0c16 /* SDV */
> -#define PCI_DEVICE_ID_INTEL_HASWELL_E_HB 0x0c04
> +#define PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_PLUS_IG 0x042a
> +#define PCI_DEVICE_ID_INTEL_HASWELL_E_HB 0x0c04
> +#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT1_IG 0x0C02
> +#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT2_IG 0x0C12
> +#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT2_PLUS_IG 0x0C22
> +#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT1_IG 0x0C06
> +#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT2_IG 0x0C16
> +#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT2_PLUS_IG 0x0C26
> +#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT1_IG 0x0C0A
> +#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT2_IG 0x0C1A
> +#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT2_PLUS_IG 0x0C2A
> +#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT1_IG 0x0A02
> +#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT2_IG 0x0A12
> +#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT2_PLUS_IG 0x0A22
> +#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT1_IG 0x0A06
> +#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT2_IG 0x0A16
> +#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT2_PLUS_IG 0x0A26
> +#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT1_IG 0x0A0A
> +#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT2_IG 0x0A1A
> +#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT2_PLUS_IG 0x0A2A
> +#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_D_GT1_IG 0x0D12
> +#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_D_GT2_IG 0x0D22
> +#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_D_GT2_PLUS_IG 0x0D32
> +#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_M_GT1_IG 0x0D16
> +#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_M_GT2_IG 0x0D26
> +#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_M_GT2_PLUS_IG 0x0D36
> +#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_S_GT1_IG 0x0D1A
> +#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_S_GT2_IG 0x0D2A
> +#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_S_GT2_PLUS_IG 0x0D3A
>
> #endif
> diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
> index 9ed92ef..08fc5cb 100644
> --- a/drivers/char/agp/intel-gtt.c
> +++ b/drivers/char/agp/intel-gtt.c
> @@ -1502,15 +1502,73 @@ static const struct intel_gtt_driver_description {
> "Haswell", &sandybridge_gtt_driver },
> { PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_IG,
> "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_PLUS_IG,
> + "Haswell", &sandybridge_gtt_driver },
> { PCI_DEVICE_ID_INTEL_HASWELL_M_GT1_IG,
> "Haswell", &sandybridge_gtt_driver },
> { PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_IG,
> "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_PLUS_IG,
> + "Haswell", &sandybridge_gtt_driver },
> { PCI_DEVICE_ID_INTEL_HASWELL_S_GT1_IG,
> "Haswell", &sandybridge_gtt_driver },
> { PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_IG,
> "Haswell", &sandybridge_gtt_driver },
> - { PCI_DEVICE_ID_INTEL_HASWELL_SDV,
> + { PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_PLUS_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT1_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT2_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT2_PLUS_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT1_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT2_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT2_PLUS_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT1_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT2_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT2_PLUS_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT1_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT2_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT2_PLUS_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT1_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT2_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT2_PLUS_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT1_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT2_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT2_PLUS_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_CRW_D_GT1_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_CRW_D_GT2_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_CRW_D_GT2_PLUS_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_CRW_M_GT1_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_CRW_M_GT2_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_CRW_M_GT2_PLUS_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_CRW_S_GT1_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_CRW_S_GT2_IG,
> + "Haswell", &sandybridge_gtt_driver },
> + { PCI_DEVICE_ID_INTEL_HASWELL_CRW_S_GT2_PLUS_IG,
> "Haswell", &sandybridge_gtt_driver },
> { 0, NULL, NULL }
> };
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index ff569cc..7ebb13b 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -346,11 +346,40 @@ static const struct pci_device_id pciidlist[] = { /* aka */
> INTEL_VGA_DEVICE(0x016a, &intel_ivybridge_d_info), /* GT2 server */
> INTEL_VGA_DEVICE(0x0402, &intel_haswell_d_info), /* GT1 desktop */
> INTEL_VGA_DEVICE(0x0412, &intel_haswell_d_info), /* GT2 desktop */
> + INTEL_VGA_DEVICE(0x0422, &intel_haswell_d_info), /* GT2 desktop */
> INTEL_VGA_DEVICE(0x040a, &intel_haswell_d_info), /* GT1 server */
> INTEL_VGA_DEVICE(0x041a, &intel_haswell_d_info), /* GT2 server */
> + INTEL_VGA_DEVICE(0x042a, &intel_haswell_d_info), /* GT2 server */
> INTEL_VGA_DEVICE(0x0406, &intel_haswell_m_info), /* GT1 mobile */
> INTEL_VGA_DEVICE(0x0416, &intel_haswell_m_info), /* GT2 mobile */
> - INTEL_VGA_DEVICE(0x0c16, &intel_haswell_d_info), /* SDV */
> + INTEL_VGA_DEVICE(0x0426, &intel_haswell_m_info), /* GT2 mobile */
> + INTEL_VGA_DEVICE(0x0C02, &intel_haswell_d_info), /* SDV GT1 desktop */
> + INTEL_VGA_DEVICE(0x0C12, &intel_haswell_d_info), /* SDV GT2 desktop */
> + INTEL_VGA_DEVICE(0x0C22, &intel_haswell_d_info), /* SDV GT2 desktop */
> + INTEL_VGA_DEVICE(0x0C0A, &intel_haswell_d_info), /* SDV GT1 server */
> + INTEL_VGA_DEVICE(0x0C1A, &intel_haswell_d_info), /* SDV GT2 server */
> + INTEL_VGA_DEVICE(0x0C2A, &intel_haswell_d_info), /* SDV GT2 server */
> + INTEL_VGA_DEVICE(0x0C06, &intel_haswell_m_info), /* SDV GT1 mobile */
> + INTEL_VGA_DEVICE(0x0C16, &intel_haswell_m_info), /* SDV GT2 mobile */
> + INTEL_VGA_DEVICE(0x0C26, &intel_haswell_m_info), /* SDV GT2 mobile */
> + INTEL_VGA_DEVICE(0x0A02, &intel_haswell_d_info), /* ULT GT1 desktop */
> + INTEL_VGA_DEVICE(0x0A12, &intel_haswell_d_info), /* ULT GT2 desktop */
> + INTEL_VGA_DEVICE(0x0A22, &intel_haswell_d_info), /* ULT GT2 desktop */
> + INTEL_VGA_DEVICE(0x0A0A, &intel_haswell_d_info), /* ULT GT1 server */
> + INTEL_VGA_DEVICE(0x0A1A, &intel_haswell_d_info), /* ULT GT2 server */
> + INTEL_VGA_DEVICE(0x0A2A, &intel_haswell_d_info), /* ULT GT2 server */
> + INTEL_VGA_DEVICE(0x0A06, &intel_haswell_m_info), /* ULT GT1 mobile */
> + INTEL_VGA_DEVICE(0x0A16, &intel_haswell_m_info), /* ULT GT2 mobile */
> + INTEL_VGA_DEVICE(0x0A26, &intel_haswell_m_info), /* ULT GT2 mobile */
> + INTEL_VGA_DEVICE(0x0D12, &intel_haswell_d_info), /* CRW GT1 desktop */
> + INTEL_VGA_DEVICE(0x0D22, &intel_haswell_d_info), /* CRW GT2 desktop */
> + INTEL_VGA_DEVICE(0x0D32, &intel_haswell_d_info), /* CRW GT2 desktop */
> + INTEL_VGA_DEVICE(0x0D1A, &intel_haswell_d_info), /* CRW GT1 server */
> + INTEL_VGA_DEVICE(0x0D2A, &intel_haswell_d_info), /* CRW GT2 server */
> + INTEL_VGA_DEVICE(0x0D3A, &intel_haswell_d_info), /* CRW GT2 server */
> + INTEL_VGA_DEVICE(0x0D16, &intel_haswell_m_info), /* CRW GT1 mobile */
> + INTEL_VGA_DEVICE(0x0D26, &intel_haswell_m_info), /* CRW GT2 mobile */
> + INTEL_VGA_DEVICE(0x0D36, &intel_haswell_m_info), /* CRW GT2 mobile */
> INTEL_VGA_DEVICE(0x0f30, &intel_valleyview_m_info),
> INTEL_VGA_DEVICE(0x0157, &intel_valleyview_m_info),
> INTEL_VGA_DEVICE(0x0155, &intel_valleyview_d_info),
> --
> 1.7.10.4
>
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--
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
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