[Intel-gfx] source-based replacement for video bios on ivybridge -- I'm stuck!

Daniel Vetter daniel at ffwll.ch
Thu Aug 9 19:53:05 CEST 2012


On Thu, Aug 09, 2012 at 10:10:05AM -0700, ron minnich wrote:
> Thanks for the suggestions, I did move forward to 3.6-rc1.
> 
> It gives me lots of messages I expect, but does not yet work...
> 
> http://pastebin.com/RLp5qjQX
> 
> I'm still convinced there is some basic thing I'm not setting up
> right; still getting these pipe0 stuck messages. Now, the one thing
> I'm definitely doing different than the driver, after a discussion
> with Jesse, is not setting up the ring or status page. It's not
> supposed to be needed for this basic set up.

Yeah, this should all work without ring and status pages ...

> It all starts to go sour here:
> [000000.0] [drm:ironlake_edp_panel_on], Turn eDP power on
> [000000.0] [drm:ironlake_wait_panel_power_cycle], Wait for panel power cycle
> [000000.0] [drm:ironlake_wait_panel_status], mask b800000f value
> 00000000 status 00000000 control abcd0008
> [000000.0] [drm:ironlake_wait_panel_on], Wait for panel power on
> [000000.0] [drm:ironlake_wait_panel_status], mask b000000f value
> 80000008 status 0000000a control abcd000b
> [000000.0] [drm:ironlake_edp_panel_vdd_off], Turn eDP VDD off 1
> [000000.0] [drm:ironlake_panel_vdd_off_sync], PCH_PP_STATUS:
> 0x80000008 PCH_PP_CONTROL: 0xabcd0003
> [000000.0] [drm:intel_dp_start_link_train], too many voltage retries, give up
> 
> And then we get no further (after several iterations) than the voltage
> retries. Any further suggestions welcome :-)

If this is cpu edp, you might want to try the giant modeset-rework branch
of mine at:

http://cgit.freedesktop.org/~danvet/drm/log/?h=modeset-rework

This fixes (among tons of prep work) and ordering issue with our cpu edp
code, which at least on ivb results in stuck pipes (and black screens).

Yours, Daniel
-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48



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