[Intel-gfx] [PATCH 0/7] modeset rework prep patches

Chris Wilson chris at chris-wilson.co.uk
Sun Aug 12 21:47:56 CEST 2012


On Sun, 12 Aug 2012 19:27:07 +0200, Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
> Hi all,
> 
> I've noticed that a few prep patches of the modeset rework series haven't been
> merged nor reviewed yet, so I've split them out in this resend. Mostly concern
> really old gen2 stuff (dvo + pipe A quirk), but little patches in other areas.
> 
> Comments&review highly welcome.
> 
> Thanks, Daniel
> 
> Daniel Vetter (7):
>   drm/i915: add missing gen2 pipe A quirk entries

I remain dubious whether the 855gm entry is genuine.

>   drm/i915/ns2501: kill pll A enabling hack
>   drm/i915: rip out the overlay pipe A workaround

Look fine and a welcome reduction in code + confusion.

>   drm/i915: prepare load-detect pipe code for dpms changes

It is not immediately obvious from the function that there is a
relationship between the connector and intel_encoder.  If we derived the
encoder from the connector in that function, the reviewer's life gets a
little easier. As it stands the code looks correct and rightly removes
some internal details.

>   drm/i915: simplify dvo dpms interface

This just looks like churn for churn's sake? The changes look correct.

>   drm/i915: kill a few unused things in dev_priv

+1

>   drm/i915: extract ironlake_fdi_pll_disable

Smaller more descriptive functions, what is not to like.

2-7: Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
You can have an r-b for 1 if you drop the 855gm chunk. Then get someone
else to a-b the 855gm entry :)
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre



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