[Intel-gfx] [PATCH v3 0/2] Haswell intel_audio_dump support
Wang Xingchao
xingchao.wang at intel.com
Wed Aug 15 10:13:36 CEST 2012
This patch enabled intel_audio_dump to support Haswell platform. Haswell has
some registers differences comprared with previous platforms.
Changes since V1:
- fix compile warnings
- remove HBR bits show, it doesnot exist under Haswell
Changes since V2:
- fix comments style
This is output of intel_audio_dump under one Haswell machine:
DDI_BUF_CTL_A 0x00000080 DDI Buffer Controler A
DDI_BUF_CTL_B 0x00000000 DDI Buffer Controler B
DDI_BUF_CTL_C 0x00000080 DDI Buffer Controler C
DDI_BUF_CTL_D 0x00000000 DDI Buffer Controler D
DDI_BUF_CTL_E 0x80000002 DDI Buffer Controler E
PIPE_CONF_A 0xc0000000 PIPE Configuration A
PIPE_CONF_B 0x00000000 PIPE Configuration B
PIPE_CONF_C 0x00000000 PIPE Configuration C
PIPE_CONF_EDP 0x00000000 PIPE Configuration EDP
PIPE_DDI_FUNC_CTL_A 0xc4034002 PIPE DDI Function Control A
PIPE_DDI_FUNC_CTL_B 0xa0035000 PIPE DDI Function Control B
PIPE_DDI_FUNC_CTL_C 0x00030000 PIPE DDI Function Control C
PIPE_DDI_FUNC_CTL_EDP 0x00030000 PIPE DDI Function Control EDP
DP_TP_CTL_A 0x00000000 DisplayPort Transport A Control
DP_TP_CTL_B 0x00000000 DisplayPort Transport B Control
DP_TP_CTL_C 0x00000000 DisplayPort Transport C Control
DP_TP_CTL_D 0x00000000 DisplayPort Transport D Control
DP_TP_CTL_E 0x80048300 DisplayPort Transport E Control
DP_TP_ST_A 0x00000000 DisplayPort Transport A Status
DP_TP_ST_B 0x00000000 DisplayPort Transport B Status
DP_TP_ST_C 0x00000000 DisplayPort Transport C Status
DP_TP_ST_D 0x00000000 DisplayPort Transport D Status
DP_TP_ST_E 0x00001000 DisplayPort Transport E Status
TRANS_CONF_A 0xc0000000 Transcoder A Configuration
TRANS_CONF_B 0xc0000000 Transcoder B Configuration
TRANS_CONF_C 0xc0000000 Transcoder C Configuration
AUD_CONFIG_A 0x0070fa60 Audio Configuration - Transcoder A
AUD_CONFIG_B 0x0070fa60 Audio Configuration - Transcoder B
AUD_CONFIG_C 0x0070fa60 Audio Configuration - Transcoder C
AUD_MISC_CTRL_A 0x00000044 Audio MISC Control for Transcoder A
AUD_MISC_CTRL_B 0x00000044 Audio MISC Control for Transcoder B
AUD_MISC_CTRL_C 0x00000044 Audio MISC Control for Transcoder C
AUD_VID_DID 0x80862807 Audio Vendor ID / Device ID
AUD_RID 0x00100000 Audio Revision ID
AUD_CTS_ENABLE_A 0x00000000 Audio CTS Programming Enable - Transcoder A
AUD_CTS_ENABLE_B 0x00000000 Audio CTS Programming Enable - Transcoder B
AUD_CTS_ENABLE_C 0x00000000 Audio CTS Programming Enable - Transcoder C
AUD_PWRST 0x00000fff Audio Power State (Function Group, Convertor, Pin Widget)
AUD_HDMIW_HDMIEDID_A 0x00000000 HDMI Data EDID Block - Transcoder A
AUD_HDMIW_HDMIEDID_B 0x4c4c4544 HDMI Data EDID Block - Transcoder B
AUD_HDMIW_HDMIEDID_C 0x00000000 HDMI Data EDID Block - Transcoder C
AUD_HDMIW_INFOFR_A 0x00000000 Audio Widget Data Island Packet - Transcoder A
AUD_HDMIW_INFOFR_B 0x00000000 Audio Widget Data Island Packet - Transcoder B
AUD_HDMIW_INFOFR_C 0x00000000 Audio Widget Data Island Packet - Transcoder C
AUD_PORT_EN_HD_CFG 0x00770207 Audio Pipe and Convert Configs
AUD_OUT_DIG_CNVT_A 0x00000280 Audio Digital Converter - Conv A
AUD_OUT_DIG_CNVT_B 0x00200280 Audio Digital Converter - Conv B
AUD_OUT_DIG_CNVT_C 0x00000280 Audio Digital Converter - Conv C
AUD_OUT_CHAN_MAP 0x0077f777 Audio Output Channel Mapping
AUD_OUT_STR_DESC_A 0x00050000 Audio Stream Descriptor Format - Conv A
AUD_OUT_STR_DESC_B 0x00014011 Audio Stream Descriptor Format - Conv B
AUD_OUT_STR_DESC_C 0x00050000 Audio Stream Descriptor Format - Conv C
AUD_PINW_CONNLNG_LIST_A 0x00000001 Audio Connection List entry and Length - Transcoder A
AUD_PINW_CONNLNG_LIST_B 0x00000301 Audio Connection List entry and Length - Transcoder B
AUD_PINW_CONNLNG_LIST_C 0x00000001 Audio Connection List entry and Length - Transcoder C
AUD_PIPE_CONN_SEL_CTRL 0x00030003 Audio Pipe Connection Select Control
AUD_DIP_ELD_CTRL_ST_A 0x000054c9 Audio DIP and ELD control state - Transcoder A
AUD_DIP_ELD_CTRL_ST_B 0x002354c9 Audio DIP and ELD control state - Transcoder B
AUD_DIP_ELD_CTRL_ST_C 0x000054c9 Audio DIP and ELD control state - Transcoder C
AUD_PIN_ELD_CP_VLD 0x00000555 audio pin eld valid status
AUD_HDMIW_STATUS 0x00000000 Audio HDMI FIFO Status
Details:
AUD_VID_DID vendor id 0x8086
AUD_VID_DID device id 0x2807
AUD_RID Major_Revision 0x1
AUD_RID Minor_Revision 0x0
AUD_RID Revision_Id 0x0
AUD_RID Stepping_Id 0x0
Audio DIP and ELD control state for TranscoderA
Audio DIP port select [0x0] Reserved
Audio DIP type enable status [0x0] Audio DIP Disabled
DIP Buffer Index [0x0] Audio DIP
DIP_transmission_frequency [0x0] disabled
ELD_ACK 0
ELD_buffer_size 21
Audio DIP and ELD control state for TranscoderB
Audio DIP port select [0x0] Reserved
Audio DIP type enable status [0x1] Audio DIP Enabled
DIP Buffer Index [0x0] Audio DIP
DIP_transmission_frequency [0x3] best effort
ELD_ACK 0
ELD_buffer_size 21
Audio DIP and ELD control state for TranscoderC
Audio DIP port select [0x0] Reserved
Audio DIP type enable status [0x0] Audio DIP Disabled
DIP Buffer Index [0x0] Audio DIP
DIP_transmission_frequency [0x0] disabled
ELD_ACK 0
ELD_buffer_size 21
DDI A Buffer control
DDI Buffer Enable 0
DP port width [0x0] x1 mode
DDI B Buffer control
DDI Buffer Enable 0
DP port width [0x0] x1 mode
DDI C Buffer control
DDI Buffer Enable 0
DP port width [0x0] x1 mode
DDI D Buffer control
DDI Buffer Enable 0
DP port width [0x0] x1 mode
DDI E Buffer control
DDI Buffer Enable 1
DP port width [0x1] x2 mode
Pipe A DDI Function Control
PIPE DDI Function Enable [0x1]
PIPE DDI selection [0x4] reserved
PIPE DDI Mode [0x4] DP FDI mode
BITS per color [0x0]
Pipe B DDI Function Control
PIPE DDI Function Enable [0x1]
PIPE DDI selection [0x2] Digital Port C
PIPE DDI Mode [0x0] HDMI mode
BITS per color [0x0]
Pipe C DDI Function Control
PIPE DDI Function Enable [0x0]
PIPE DDI selection [0x0] no port
PIPE DDI Mode [0x0] HDMI mode
BITS per color [0x0]
AUD_CONFIG_A N_index_value [0x0] HDMI
AUD_CONFIG_A N_programming_enable 0
AUD_CONFIG_A Upper_N_value 0x07
AUD_CONFIG_A Lower_N_value 0xfa6
AUD_CONFIG_A Pixel_Clock_HDMI [0x0] 25.2 / 1.001 MHz
AUD_CONFIG_A Disable_NCTS 0
AUD_CONFIG_B N_index_value [0x0] HDMI
AUD_CONFIG_B N_programming_enable 0
AUD_CONFIG_B Upper_N_value 0x07
AUD_CONFIG_B Lower_N_value 0xfa6
AUD_CONFIG_B Pixel_Clock_HDMI [0x0] 25.2 / 1.001 MHz
AUD_CONFIG_B Disable_NCTS 0
AUD_CONFIG_C N_index_value [0x0] HDMI
AUD_CONFIG_C N_programming_enable 0
AUD_CONFIG_C Upper_N_value 0x07
AUD_CONFIG_C Lower_N_value 0xfa6
AUD_CONFIG_C Pixel_Clock_HDMI [0x0] 25.2 / 1.001 MHz
AUD_CONFIG_C Disable_NCTS 0
AUD_CTS_ENABLE_A Enable_CTS_or_M_programming 0
AUD_CTS_ENABLE_A CTS_M value Index M
AUD_CTS_ENABLE_A CTS_programming 0
AUD_CTS_ENABLE_B Enable_CTS_or_M_programming 0
AUD_CTS_ENABLE_B CTS_M value Index M
AUD_CTS_ENABLE_B CTS_programming 0
AUD_CTS_ENABLE_C Enable_CTS_or_M_programming 0
AUD_CTS_ENABLE_C CTS_M value Index M
AUD_CTS_ENABLE_C CTS_programming 0
AUD_MISC_CTRL_A Sample_Fabrication_EN_bit 1
AUD_MISC_CTRL_A Sample_present_Disable 0
AUD_MISC_CTRL_A Output_Delay 4
AUD_MISC_CTRL_A Pro_Allowed 0
AUD_MISC_CTRL_B Sample_Fabrication_EN_bit 1
AUD_MISC_CTRL_B Sample_present_Disable 0
AUD_MISC_CTRL_B Output_Delay 4
AUD_MISC_CTRL_B Pro_Allowed 0
AUD_MISC_CTRL_C Sample_Fabrication_EN_bit 1
AUD_MISC_CTRL_C Sample_present_Disable 0
AUD_MISC_CTRL_C Output_Delay 4
AUD_MISC_CTRL_C Pro_Allowed 0
AUD_PWRST Func_Grp_Dev_PwrSt_Curr D0
AUD_PWRST Func_Grp_Dev_PwrSt_Set D0
AUD_PWRST ConvertorA_Widget_Power_State_Current D0
AUD_PWRST ConvertorA_Widget_Power_State_Requsted D0
AUD_PWRST ConvertorB_Widget_Power_State_Current D0
AUD_PWRST ConvertorB_Widget_Power_State_Requested D0
AUD_PWRST ConvC_Widget_PwrSt_Curr D0
AUD_PWRST ConvC_Widget_PwrSt_Req D0
AUD_PWRST PinB_Widget_Power_State_Current D3
AUD_PWRST PinB_Widget_Power_State_Set D3
AUD_PWRST PinC_Widget_Power_State_Current D3
AUD_PWRST PinC_Widget_Power_State_Set D3
AUD_PWRST PinD_Widget_Power_State_Current D3
AUD_PWRST PinD_Widget_Power_State_Set D3
AUD_PORT_EN_HD_CFG Convertor_A_Digen 1
AUD_PORT_EN_HD_CFG Convertor_B_Digen 1
AUD_PORT_EN_HD_CFG Convertor_C_Digen 1
AUD_PORT_EN_HD_CFG ConvertorA_Stream_ID 0
AUD_PORT_EN_HD_CFG ConvertorB_Stream_ID 2
AUD_PORT_EN_HD_CFG ConvertorC_Stream_ID 0
AUD_PORT_EN_HD_CFG Port_B_Out_Enable 1
AUD_PORT_EN_HD_CFG Port_C_Out_Enable 1
AUD_PORT_EN_HD_CFG Port_D_Out_Enable 1
AUD_PORT_EN_HD_CFG Port_B_Amp_Mute_Status 1
AUD_PORT_EN_HD_CFG Port_C_Amp_Mute_Status 1
AUD_PORT_EN_HD_CFG Port_D_Amp_Mute_Status 1
AUD_OUT_DIG_CNVT_A V 0
AUD_OUT_DIG_CNVT_A VCFG 0
AUD_OUT_DIG_CNVT_A PRE 0
AUD_OUT_DIG_CNVT_A Copy 0
AUD_OUT_DIG_CNVT_A NonAudio 0
AUD_OUT_DIG_CNVT_A PRO 0
AUD_OUT_DIG_CNVT_A Level 1
AUD_OUT_DIG_CNVT_A Category_Code 2
AUD_OUT_DIG_CNVT_A Lowest_Channel_Number 0
AUD_OUT_DIG_CNVT_A Stream_ID 0
AUD_OUT_DIG_CNVT_B V 0
AUD_OUT_DIG_CNVT_B VCFG 0
AUD_OUT_DIG_CNVT_B PRE 0
AUD_OUT_DIG_CNVT_B Copy 0
AUD_OUT_DIG_CNVT_B NonAudio 0
AUD_OUT_DIG_CNVT_B PRO 0
AUD_OUT_DIG_CNVT_B Level 1
AUD_OUT_DIG_CNVT_B Category_Code 2
AUD_OUT_DIG_CNVT_B Lowest_Channel_Number 0
AUD_OUT_DIG_CNVT_B Stream_ID 2
AUD_OUT_DIG_CNVT_C V 0
AUD_OUT_DIG_CNVT_C VCFG 0
AUD_OUT_DIG_CNVT_C PRE 0
AUD_OUT_DIG_CNVT_C Copy 0
AUD_OUT_DIG_CNVT_C NonAudio 0
AUD_OUT_DIG_CNVT_C PRO 0
AUD_OUT_DIG_CNVT_C Level 1
AUD_OUT_DIG_CNVT_C Category_Code 2
AUD_OUT_DIG_CNVT_C Lowest_Channel_Number 0
AUD_OUT_DIG_CNVT_C Stream_ID 0
AUD_OUT_CHAN_MAP Converter_Channel_MAP PORTB PORTC PORTD
1 1 1 1
2 2 2 2
3 4 16 4
4 3 16 3
5 5 16 5
6 6 16 6
7 7 16 7
8 8 16 8
AUD_OUT_STR_DESC_A Convertor_Channel_Count 6
AUD_OUT_STR_DESC_A Bits_per_Sample [0] reserved
AUD_OUT_STR_DESC_A Number_of_Channels_in_a_Stream 1
AUD_OUT_STR_DESC_B Convertor_Channel_Count 2
AUD_OUT_STR_DESC_B Bits_per_Sample [0x1] 16 bits
AUD_OUT_STR_DESC_B Number_of_Channels_in_a_Stream 2
AUD_OUT_STR_DESC_C Convertor_Channel_Count 6
AUD_OUT_STR_DESC_C Bits_per_Sample [0] reserved
AUD_OUT_STR_DESC_C Number_of_Channels_in_a_Stream 1
AUD_PINW_CONNLNG_SEL Connection_select_Control_B 0
AUD_PINW_CONNLNG_SEL Connection_select_Control_C 0
AUD_PINW_CONNLNG_SEL Connection_select_Control_D 0
AUD_CNTRL_ST2 CP_ReadyB 0
AUD_CNTRL_ST2 ELD_validB 1
AUD_CNTRL_ST2 OUT_enableB 1
AUD_CNTRL_ST2 CP_ReadyC 0
AUD_CNTRL_ST2 ELD_validC 1
AUD_CNTRL_ST2 OUT_enableC 1
AUD_CNTRL_ST2 CP_ReadyD 0
AUD_CNTRL_ST2 ELD_validD 1
AUD_CNTRL_ST2 OUT_enableD 1
AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Underrun 0
AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Overrun 0
AUD_HDMIW_STATUS Conv_B_CDCLK/DOTCLK_FIFO_Underrun 0
AUD_HDMIW_STATUS Conv_B_CDCLK/DOTCLK_FIFO_Overrun 0
AUD_HDMIW_STATUS Conv_C_CDCLK/DOTCLK_FIFO_Underrun 0
AUD_HDMIW_STATUS Conv_C_CDCLK/DOTCLK_FIFO_Overrun 0
AUD_HDMIW_STATUS BCLK/CDCLK_FIFO_Overrun 0
AUD_HDMIW_STATUS Function_Reset 0
AUD_HDMIW_HDMIEDID_A HDMI ELD:
00000000 00000000 00000000 00000000 00000000
AUD_HDMIW_HDMIEDID_B HDMI ELD:
10000900 6c120001 00000000 00000000 10ac2ca0
AUD_HDMIW_HDMIEDID_C HDMI ELD:
00000000 00000000 00000000 00000000 00000000
AUD_HDMIW_INFOFR_A HDMI audio Infoframe:
00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
AUD_HDMIW_INFOFR_B HDMI audio Infoframe:
84010a70 01000000 00000000 00000000 00000000 00000000 00000000 00000000
AUD_HDMIW_INFOFR_C HDMI audio Infoframe:
00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
Wang Xingchao (2):
intel_audio_dump: fix wrong port definition
intel_audio_dump: add Haswell audio dump support
tools/intel_audio_dump.c | 590 +++++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 587 insertions(+), 3 deletions(-)
--
1.7.9.5
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