[Intel-gfx] [PATCH] drm/i915: use hsw rps tuning values everywhere on gen6+

[Paul Menzel]

Am Mittwoch, den 15.08.2012, 10:41 +0200 schrieb Daniel Vetter:
> James Bottomley reported [1] a massive power regression, due to the
> enabling of semaphores by default in 3.5. A workaround for him is to
> again disable semaphores. And indeed, his system has a very hard time
> to entre rc6 with semaphores enabled.

s,entre,enter,

> Ben Widawsky run around with a kill-a-watt a lot and noticed:
> - There are indeed a few rare systems that seem to have a hard time
>   entering rc6 when desktop-idle.
> - One machine, The Indestructible Toshiba regressed in this behaviour

Never heard that Toshiba name.

>   between 3.5 and 3.6 in a merge commit! So rc6 behaviour with the
>   current setting seems to be highly timing dependent and not robust
>   at all.
> - The behaviour James reported wrt semaphores seems to be a freak
>   timing thing that only happens on his specific machine, confirming
>   that enabling semaphores shouldn't reduce rc6 residency.
> 
> Now furthermore the Google ChromeOS guys reported [2] a while ago that
> at least on some machines a simply a blinking cursor can keep the gpu
> turbo at the highest frequency. This is because the current rps limits
> used on snb/ivb are highly asymmetric.
> 
> On the theory that gpu turbo and rc6 tuning values are related, we've
> tried whether the much saner looking (since much less asymmetric) rps
> tuning values used for hsw would also help entering rc6 more robustly.
> 
> And it seems to work.
> 
> Reference[1]: http://lists.freedesktop.org/archives/dri-devel/2012-July/025675.html
> Reference[2]: http://lists.freedesktop.org/archives/intel-gfx/2012-July/018692.html
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=53393
> Tested-by: Ben Widawsky <ben at bwidawsk.net>

Did James already confirm, that this fixes his problem?

> Cc: stable at vger.kernel.org
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> ---
>  drivers/gpu/drm/i915/intel_pm.c |   15 ++++-----------
>  1 file changed, 4 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index d64dffb..cf10a1d 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -2482,17 +2482,10 @@ static void gen6_enable_rps(struct drm_device *dev)
>  		   dev_priv->rps.max_delay << 24 |
>  		   dev_priv->rps.min_delay << 16);
>  
> -	if (IS_HASWELL(dev)) {
> -		I915_WRITE(GEN6_RP_UP_THRESHOLD, 59400);
> -		I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 245000);
> -		I915_WRITE(GEN6_RP_UP_EI, 66000);
> -		I915_WRITE(GEN6_RP_DOWN_EI, 350000);
> -	} else {
> -		I915_WRITE(GEN6_RP_UP_THRESHOLD, 10000);
> -		I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 1000000);
> -		I915_WRITE(GEN6_RP_UP_EI, 100000);
> -		I915_WRITE(GEN6_RP_DOWN_EI, 5000000);
> -	}
> +	I915_WRITE(GEN6_RP_UP_THRESHOLD, 59400);
> +	I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 245000);
> +	I915_WRITE(GEN6_RP_UP_EI, 66000);
> +	I915_WRITE(GEN6_RP_DOWN_EI, 350000);
>  
>  	I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10);
>  	I915_WRITE(GEN6_RP_CONTROL,

Acked-by: Paul Menzel <paulepanter at users.sourceforge.net>


Thanks,

Paul
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