[Intel-gfx] [PATCH 1/4] drm/i915: save/restore the legacy backlight control

Daniel Vetter daniel at ffwll.ch
Tue Aug 28 16:14:38 CEST 2012


On Tue, Aug 28, 2012 at 03:56:31PM +0200, Indan Zupancic wrote:
> Hello,
> 
> On Tue, August 28, 2012 08:53, Jani Nikula wrote:
> > From: Daniel Vetter <daniel.vetter at ffwll.ch>
> >
> > This is a prep patch to stop drm/i915 from changing the LBPC registers
> > itself - but we still need to properly save/restore it on
> > suspend/resume.
> >
> > Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> > Signed-off-by: Jani Nikula <jani.nikula at intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_drv.h     |    1 +
> >  drivers/gpu/drm/i915/i915_reg.h     |    3 +++
> >  drivers/gpu/drm/i915/i915_suspend.c |    8 ++++++++
> >  drivers/gpu/drm/i915/intel_panel.c  |    2 --
> >  4 files changed, 12 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 58b43db..af1701c 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -606,6 +606,7 @@ typedef struct drm_i915_private {
> >  	u32 savePP_CONTROL;
> >  	u32 savePP_DIVISOR;
> >  	u32 savePFIT_CONTROL;
> > +	u8 saveLBPC;
> >  	u32 save_palette_a[256];
> >  	u32 save_palette_b[256];
> >  	u32 saveDPFC_CB_BASE;
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index d0b60f2..3303c18 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -1889,6 +1889,9 @@
> >
> >  #define PFIT_AUTO_RATIOS 0x61238
> >
> > +/* legacy/combination backlight modes in pci config space. */
> > +#define PCI_LBPC 0xf4
> > +
> >  /* Backlight control */
> >  #define BLC_PWM_CTL2		0x61250 /* 965+ only */
> >  #define   BLM_PWM_ENABLE		(1 << 31)
> > diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
> > index 4776ccf..05daff7 100644
> > --- a/drivers/gpu/drm/i915/i915_suspend.c
> > +++ b/drivers/gpu/drm/i915/i915_suspend.c
> > @@ -639,6 +639,10 @@ static void i915_save_display(struct drm_device *dev)
> >  			dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2);
> >  		if (IS_MOBILE(dev) && !IS_I830(dev))
> >  			dev_priv->saveLVDS = I915_READ(LVDS);
> > +
> > +		if (IS_GEN2(dev) || IS_GEN4(dev))
> > +			pci_read_config_byte(dev->pdev, PCI_LBPC,
> > +					     &dev_priv->saveLBPC);
> 
> What about GEN3?
> 
> It seems weird that LBPC wouldn't be restored during resume by some BIOSes,
> is this really necessary?

ba3820ade317ee36e496b9b40d2ec3987dd4aef0 claims so. But that commit
managed to put too many things into the same thing unfortunately.
-Daniel
-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48



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