[Intel-gfx] [PATCH] drm/i915: Fixup hpd irq register setup ordering
Jesse Barnes
jbarnes at virtuousgeek.org
Mon Dec 10 22:01:43 CET 2012
On Sun, 9 Dec 2012 20:42:01 +0100
Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
> For GMCH platforms we set up the hpd irq registers in the irq
> postinstall hook. But since we only enable the irq sources we actually
> need in PORT_HOTPLUG_EN/STATUS, taking dev_priv->hotplug_supported_mask
> into account, no hpd interrupt sources is enabled since
>
> commit 52d7ecedac3f96fb562cb482c139015372728638
> Author: Daniel Vetter <daniel.vetter at ffwll.ch>
> Date: Sat Dec 1 21:03:22 2012 +0100
>
> drm/i915: reorder setup sequence to have irqs for output setup
>
> Wrongly set-up interrupts also lead broken hw-based load-detection on
> at least GM45, resulting in ghost VGA/TV-out outputs.
..."can lead to broken"... or "also leads to" ?
> +
> +void intel_hpd_init(struct drm_device *dev)
> +{
> + struct drm_i915_private *dev_priv = dev->dev_private;
> +
> + if (dev_priv->display.hpd_irq_setup)
> + dev_priv->display.hpd_irq_setup(dev);
> +
> + /*
> + * Some ports require correctly set-up hpd registers for detection to
> + * work properly, e.g. VGA on gm45. Hence we can only set up the initial
> + * fbdev config after hpd irqs are fully enabled. Now we should scan for
> + * the initial config only once hotplug handling is enabled, but due to
> + * screwed-up locking around kms/fbdev init we can't protect the fdbev
> + * initial config scanning against hotplug events. Hence do this first
> + * and ignore the tiny window where we will loose hotplug notifactions.
> + */
> + intel_fbdev_initial_config(dev);
> +
> + /* Only enable hotplug handling once the fbdev is fully set up. */
> + dev_priv->enable_hotplug_processing = true;
> +
> + drm_kms_helper_poll_init(dev);
> +}
I'd rather see these calls in load_modeset_init(). Having
fbdev_initial_config here at least is confusing, and since poll_init
depends on it...
With those two nits:
Reviewed-by: Jesse Barnes <jbarnes at virtuousgeek.org>
--
Jesse Barnes, Intel Open Source Technology Center
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