[Intel-gfx] [PATCH 3/3] drm/i915: add gen6+ registers to i915_swizzle_info

[Ben Widawsky]

On Tue, Jan 31, 2012 at 04:47:56PM +0100, Daniel Vetter wrote:
> Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Ben Widawsky <ben at bwidawsk.net>
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c |   13 +++++++++++++
>  1 files changed, 13 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 681cbe4..4ebca6d 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1422,6 +1422,19 @@ static int i915_swizzle_info(struct seq_file *m, void *data)
>  			   I915_READ16(C0DRB3));
>  		seq_printf(m, "C1DRB3 = 0x%04x\n",
>  			   I915_READ16(C1DRB3));
> +	} else if (IS_GEN6(dev) || IS_GEN7(dev)) {
> +		seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
> +			   I915_READ(MAD_DIMM_C0));
> +		seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
> +			   I915_READ(MAD_DIMM_C1));
> +		seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n",
> +			   I915_READ(MAD_DIMM_C2));
> +		seq_printf(m, "TILECTL = 0x%08x\n",
> +			   I915_READ(TILECTL));
> +		seq_printf(m, "ARB_MODE = 0x%08x\n",
> +			   I915_READ(ARB_MODE));
> +		seq_printf(m, "DISP_ARB_CTL = 0x%08x\n",
> +			   I915_READ(DISP_ARB_CTL));
>  	}
>  	mutex_unlock(&dev->struct_mutex);
>  
> -- 
> 1.7.7.5
>