[Intel-gfx] [PATCH 1/2] drm/i915: set interlaced bits for TRANSCONF

Jesse Barnes jbarnes at virtuousgeek.org
Wed Feb 8 23:58:33 CET 2012

On Fri,  3 Feb 2012 17:47:15 -0200
Paulo Zanoni <przanoni at gmail.com> wrote:

> From: Paulo Zanoni <paulo.r.zanoni at intel.com>
> I'm not sure why they are needed (I didn't notice any difference in my
> tests), but these bits are in our documentation and they are also set by
> the Windows driver.
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
> ---

This makes me think we should really just split the PCH related stuff
into separate functions and headers with their own register and bit
definitions.  Duplicate code is better than fragility and having to
scour through multiple docs when shared code is modified.

But obviously that's a much bigger cleanup that can come after this

Ideally, anytime we had a register block with any different offsets or
bits than a previous generation, we'd fork it into its own reg
definition header and add function hooks for it.

Jesse Barnes, Intel Open Source Technology Center
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