[Intel-gfx] [PATCH 2/2] intel: Detect cache domain inconsistency with valgrind

[Daniel Vetter]

On Thu, Feb 09, 2012 at 10:43:11AM +0000, Chris Wilson wrote:
> Every access to either the GTT or CPU pointer is supposed to be
> proceeded by a set_domain ioctl so that GEM is able to manage the cache
> domains correctly and for the following access to be coherent. Of
> course, some people explicitly want incoherent, non-blocking access
> which is going to trigger warnings by this patch but are probably better
> served by explicit suppression.
> 
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

I think we should also mark the mmaps incoherent when putting a bo into
the libdrm cache to catch use after free issues (and issues with
concurrent set_tiling).
-Daniel
-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48