[Intel-gfx] [PATCH] intel: Detect cache domain inconsistency with valgrind

Daniel Vetter daniel at ffwll.ch
Sat Feb 11 12:57:27 CET 2012

On Sat, Feb 11, 2012 at 11:47:36AM +0000, Chris Wilson wrote:
> Every access to either the GTT or CPU pointer is supposed to be
> proceeded by a set_domain ioctl so that GEM is able to manage the cache
> domains correctly and for the following access to be coherent. Of
> course, some people explicitly want incoherent, non-blocking access
> which is going to trigger warnings by this patch but are probably better
> served by explicit suppression.
> v2: Also mark the pointers as inaccessible following the explicit unmap
> and implicit unmap upon return to the cache.
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Reviewed-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48

More information about the Intel-gfx mailing list