[Intel-gfx] [PATCH 04/11] drm/i915/context: CXT_SIZE register offsets added

Ben Widawsky ben at bwidawsk.net
Wed Feb 15 21:05:28 CET 2012


On Wed, 15 Feb 2012 11:39:47 -0800
Eric Anholt <eric at anholt.net> wrote:

> On Tue, 14 Feb 2012 22:09:11 +0100, Ben Widawsky <ben at bwidawsk.net> wrote:
> > From: Ben Widawsky <bwidawsk at gmail.com>
> > 
> > The GPUs can have different default context layouts, and the sizes could
> > vary based on platform or BIOS. In order to back the context object with
> > a properly sized BO, we must read this register in order to find out a
> > sufficient size.
> > 
> > Thankfully (sarcarm!), the register moves and changes meanings
> > throughout generations.
> > 
> > CTX and CXT differences are intentional as that is how it is in the
> > documentation (prior to GEN6 it was CXT).
> > 
> > Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> > ---
> >  drivers/gpu/drm/i915/i915_reg.h |   13 +++++++++++++
> >  1 files changed, 13 insertions(+), 0 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index 0c785af..5e61e79 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -1361,6 +1361,19 @@
> >   */
> >  #define CCID			0x2180
> >  #define   CCID_EN		(1<<0)
> > +#define CXT_SIZE		0x21a0
> > +#define GEN6_CXT_RENDER_SIZE ((I915_READ(CXT_SIZE) >> 12) & 0x3f)
> > +#define GEN6_CXT_EXTENDED_SIZE ((I915_READ(CXT_SIZE) >> 6) & 0x3f)
> > +#define GEN6_CXT_PIPELINE_SIZE ((I915_READ(CXT_SIZE) >> 0) & 0x3f)
> > +#define GEN6_CXT_TOTAL_SIZE (GEN6_CXT_RENDER_SIZE + GEN6_CXT_EXTENDED_SIZE + GEN6_CXT_PIPELINE_SIZE)
> > +#define GEN7_CTX_SIZE		0x21a8
> > +#define GEN7_CTX_RENDER_SIZE ((I915_READ(GEN7_CTX_SIZE) >> 16) & 0x3f)
> > +#define GEN7_CTX_EXTENDED_SIZE ((I915_READ(GEN7_CTX_SIZE) >> 9) & 0x7f)
> > +#define GEN7_CTX_GT1_SIZE ((I915_READ(GEN7_CTX_SIZE) >> 6) & 0x7)
> > +#define GEN7_CTX_VFSTATE_SIZE ((I915_READ(GEN7_CTX_SIZE) >> 0) & 0x3f)
> > +#define GEN7_CTX_TOTAL_SIZE (GEN7_CTX_RENDER_SIZE + GEN7_CTX_EXTENDED_SIZE \
> > +			    + GEN7_CTX_GT1_SIZE + GEN7_CTX_VFSTATE_SIZE)
> > +
> 
> I was surprised to see register reads in i915_reg.h definitions.  I'd
> rather see this folded into the one callsite, and just the reg numbers
> in i915_reg.h.

This will be fixed.

> 
> There's a bit of a discrepancy here -- CXT vs CTX.  The docs appear to
> actually use CXT, which I will probably never type successfully since
> contexts are "ctx" all over my other code.  Still, consistently using
> the docs' spelling is probably better than inconsistently using it :)

I think maybe a comment warning the reader of the typo could help.




More information about the Intel-gfx mailing list