[Intel-gfx] [PATCH 13/14] drm/i915: use uncached writes in pwrite
Daniel Vetter
daniel.vetter at ffwll.ch
Thu Feb 16 13:11:39 CET 2012
It's around 20% faster.
Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
---
drivers/gpu/drm/i915/i915_gem.c | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 48bef0b..9f49421 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -659,9 +659,9 @@ i915_gem_shmem_pwrite(struct drm_device *dev,
if (partial_cacheline_write)
drm_clflush_virt_range(vaddr + shmem_page_offset,
page_length);
- ret = __copy_from_user_inatomic(vaddr + shmem_page_offset,
- user_data,
- page_length);
+ ret = __copy_from_user_inatomic_nocache(vaddr + shmem_page_offset,
+ user_data,
+ page_length);
if (needs_clflush)
drm_clflush_virt_range(vaddr + shmem_page_offset,
page_length);
--
1.7.7.5
More information about the Intel-gfx
mailing list