[Intel-gfx] [PATCH 4/5] intel_reg_dumper: Add dumping of GPU turbo regs.

[Eric Anholt]

I was interested in finding why my IVB system is not getting GPU turbo
after suspend/resume.  The piece that looks weird to me is that
INTERRUPT_THRESHOLD is sitting at 0, whereas pre-suspend it's
0x12000000.
---
 lib/intel_reg.h          |   31 +++++++++++++++++++++++++++++++
 tools/intel_reg_dumper.c |   20 ++++++++++++++++++++
 2 files changed, 51 insertions(+), 0 deletions(-)

diff --git a/lib/intel_reg.h b/lib/intel_reg.h
index c7cd857..427efee 100644
--- a/lib/intel_reg.h
+++ b/lib/intel_reg.h
@@ -3511,4 +3511,35 @@ typedef enum {
 #define RC6p_RESIDENCY_TIME         0x13810C
 #define RC6pp_RESIDENCY_TIME        0x138110
 
+#define GEN6_RPNSWREQ				0xA008
+#define GEN6_RC_VIDEO_FREQ			0xA00C
+#define GEN6_RC_CONTROL				0xA090
+#define GEN6_RP_DOWN_TIMEOUT			0xA010
+#define GEN6_RP_INTERRUPT_LIMITS		0xA014
+#define GEN6_RPSTAT1				0xA01C
+#define GEN6_RP_CONTROL				0xA024
+#define GEN6_RP_UP_THRESHOLD			0xA02C
+#define GEN6_RP_DOWN_THRESHOLD			0xA030
+#define GEN6_RP_CUR_UP_EI			0xA050
+#define GEN6_RP_CUR_UP				0xA054
+#define GEN6_RP_PREV_UP				0xA058
+#define GEN6_RP_CUR_DOWN_EI			0xA05C
+#define GEN6_RP_CUR_DOWN			0xA060
+#define GEN6_RP_PREV_DOWN			0xA064
+#define GEN6_RP_UP_EI				0xA068
+#define GEN6_RP_DOWN_EI				0xA06C
+#define GEN6_RP_IDLE_HYSTERSIS			0xA070
+#define GEN6_RC_STATE				0xA094
+#define GEN6_RC1_WAKE_RATE_LIMIT		0xA098
+#define GEN6_RC6_WAKE_RATE_LIMIT		0xA09C
+#define GEN6_RC6pp_WAKE_RATE_LIMIT		0xA0A0
+#define GEN6_RC_EVALUATION_INTERVAL		0xA0A8
+#define GEN6_RC_IDLE_HYSTERSIS			0xA0AC
+#define GEN6_RC_SLEEP				0xA0B0
+#define GEN6_RC1e_THRESHOLD			0xA0B4
+#define GEN6_RC6_THRESHOLD			0xA0B8
+#define GEN6_RC6p_THRESHOLD			0xA0BC
+#define GEN6_RC6pp_THRESHOLD			0xA0C0
+#define GEN6_PMINTRMSK				0xA168
+
 #endif /* _I810_REG_H */
diff --git a/tools/intel_reg_dumper.c b/tools/intel_reg_dumper.c
index c5249cb..9f281eb 100644
--- a/tools/intel_reg_dumper.c
+++ b/tools/intel_reg_dumper.c
@@ -1826,6 +1826,23 @@ _intel_dump_regs(struct reg_debug *regs, int count)
 	}
 }
 
+DEBUGSTRING(gen6_rp_control)
+{
+	snprintf(result, len, "%s",
+		 (val & (1 << 7)) ? "enabled" : "disabled");
+}
+
+static struct reg_debug gen6_rp_debug_regs[] = {
+	DEFINEREG2(GEN6_RP_CONTROL, gen6_rp_control),
+	DEFINEREG(GEN6_RPNSWREQ),
+	DEFINEREG(GEN6_RP_DOWN_TIMEOUT),
+	DEFINEREG(GEN6_RP_INTERRUPT_LIMITS),
+	DEFINEREG(GEN6_RP_UP_THRESHOLD),
+	DEFINEREG(GEN6_RP_UP_EI),
+	DEFINEREG(GEN6_RP_DOWN_EI),
+	DEFINEREG(GEN6_RP_IDLE_HYSTERSIS),
+};
+
 static void
 intel_dump_other_regs(void)
 {
@@ -2097,5 +2114,8 @@ int main(int argc, char** argv)
 		intel_dump_other_regs();
 	}
 
+	if (IS_GEN6(devid) || IS_GEN7(devid))
+		intel_dump_regs(gen6_rp_debug_regs);
+
 	return 0;
 }
-- 
1.7.9