[Intel-gfx] [PATCH 1/1] drm/i915: fix operator precedence when enabling RC6p

Jesse Barnes jbarnes at virtuousgeek.org
Fri Feb 24 18:33:47 CET 2012


On Thu, 23 Feb 2012 23:57:06 -0200
Eugeni Dodonov <eugeni.dodonov at intel.com> wrote:

> As noticed by Torsten Kaiser, the operator precedence can play tricks with
> us here.
> 
> CC: Dave Airlie <airlied at redhat.com>
> CC: Jesse Barnes <jbarnes at virtuousgeek.org>
> Signed-off-by: Eugeni Dodonov <eugeni.dodonov at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index e654f32..4871ba0 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -8194,7 +8194,7 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
>  
>  	if (intel_enable_rc6(dev_priv->dev))
>  		rc6_mask = GEN6_RC_CTL_RC6_ENABLE |
> -			(IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0;
> +			((IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0);
>  
>  	I915_WRITE(GEN6_RC_CONTROL,
>  		   rc6_mask |

ugg yeah, with the old code we'd never end up enabling rc6 at all.
Pushed.

Thanks,
-- 
Jesse Barnes, Intel Open Source Technology Center
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