[Intel-gfx] gen7 missed IRQ workaround series.

Daniel Vetter daniel at ffwll.ch
Wed Jan 4 18:02:21 CET 2012

On Tue, Jan 03, 2012 at 03:38:25PM -0800, Keith Packard wrote:
> On Wed, 4 Jan 2012 00:04:18 +0100, Daniel Vetter <daniel at ffwll.ch> wrote:
> > I kinda prefer Chris' approach of sticking with irqs, but backing it up
> > with a timer in the msec range. Can't find that patch though atm (iirc
> > it's in bugzilla somewhere).
> I think we've resolved that the interrupt arrives, but that it is not
> serialized wrt the memory write. So, what I'd love to see is whether
> waiting for the irq and then busy looping for 'a while' works. This
> would allow for long-running operations to idle the CPU and then hit the
> interrupt and spin until the memory write is recognized.
> Any solution which can leave operations unacknowledged for 'ms'
> timeframes seems like a potential for serious performance
> problems. Eric's simple spinning approach seems fine for the BLT ring
> which we don't use that often; something more complicated and yet not
> entirely timer-based might be more efficient for longer-running operations.

Afaics we only spin shortly on the blt ring if
- semaphores are not enabled and
- mesa is the client.
For all other cases it's pretty easy to come up with examples where we
busy-loop for a rather long time. So I really don't like the busy-looping,
especially now that semaphores are enabled by default for ivb.
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48

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