[Intel-gfx] [PATCH 2/2] drm/i915: handle 3rd pipe

[Eugeni Dodonov]

We don't need to check 3rd pipe specifically, as it shares PLL with some
other one.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov at intel.com>
Reviewed-by: Jesse Barnes <jbarnes at virtuousgeek.org>
---
 drivers/gpu/drm/i915/i915_suspend.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index c0b945c..30d924f 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -35,6 +35,10 @@ static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe)
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32	dpll_reg;
 
+	/* On IVB, 3rd pipe shares PLL with another one */
+	if (pipe > 1)
+		return false;
+
 	if (HAS_PCH_SPLIT(dev))
 		dpll_reg = PCH_DPLL(pipe);
 	else
-- 
1.7.8