[Intel-gfx] [PATCH] drm/i915: Check that plane/pipe is disabled before removing the fb
Daniel Vetter
daniel at ffwll.ch
Tue Jan 17 11:09:21 CET 2012
On Mon, Jan 16, 2012 at 11:01:13PM +0000, Chris Wilson wrote:
> Staring at an error state such as:
>
> PGTBL_ER: 0x00000400
> Display B: Invalid tiling
> fence[0] = 05001001
> valid, x-tiled, pitch: 512, start: 0x05000000, size: 1048576
> Pinned [2]:
> 00000000 131072 0001 0001 00000000 P uncached
> 00020000 4096000 0041 0000 00000000 P uncached (name: 1)
> Plane [1]:
> CNTR: c0000000 # enabled | gamma
> STRIDE: 00001400
> SIZE: 03ff04ff
> POS: 00000000
> ADDR: 05000000
>
> Suggests that we did not clear the DSPBCNTR prior to unpinning the
> framebuffer and reusing the GTT space. Impossible! Unless our DPMS
> bookkeeping ran afoul again...
>
> In the meantime add an assertion that the plane is decoupled from the
> framebuffer prior to release.
>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Acked-by: Jesse Barnes <jbarnes at virtuousgeek.org>
> Cc: Daniel Vetter <daniel at ffwll.ch>
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48
More information about the Intel-gfx
mailing list